*** ./gmond/modules/conf.d/ibmrperf.conf.ORIG	Thu Sep  2 14:38:00 2010
--- ./gmond/modules/conf.d/ibmrperf.conf	Thu Sep  2 14:37:55 2010
***************
*** 0 ****
--- 1,42 ----
+ 
+ modules {
+   module {
+     name = "ibmrperf_module"
+     path = "modibmrperf.so"
+   }
+ }
+ 
+ collection_group {
+   collect_every = 15
+   time_threshold = 60
+   metric {
+     name = "rperf"
+     title = "Relative Performance rPerf number"
+     value_threshold = 0.0001
+   }
+ /*
+   metric {
+     name = "SPECint_rate2006"
+     title = "SPECint_rate2006 value"
+     value_threshold = 0.0001
+   }
+ */
+   metric {
+     name = "SPECint_rate_base2006"
+     title = "SPECint_rate_base2006 value"
+     value_threshold = 0.0001
+   }
+ /*
+   metric {
+     name = "SPECfp_rate2006"
+     title = "SPECfp_rate2006 value"
+     value_threshold = 0.0001
+   }
+   metric {
+     name = "SPECfp_rate_base2006"
+     title = "SPECfp_rate_base2006 value"
+     value_threshold = 0.0001
+   }
+ */
+ }
+ 
*** ./gmond/modules/ibmrperf/Makefile.am.ORIG	Thu Sep  2 14:38:08 2010
--- ./gmond/modules/ibmrperf/Makefile.am	Thu Sep  2 14:37:41 2010
***************
*** 0 ****
--- 1,16 ----
+ AM_CFLAGS  = -I$(top_builddir)/include -I$(top_builddir)/lib -I$(top_builddir)/libmetrics
+ 
+ if STATIC_BUILD
+ noinst_LTLIBRARIES    = libmodibmrperf.la
+ libmodibmrperf_la_SOURCES = mod_ibmrperf.c 
+ else
+ pkglib_LTLIBRARIES    = modibmrperf.la
+ modibmrperf_la_SOURCES = mod_ibmrperf.c 
+ modibmrperf_la_LDFLAGS = -module -avoid-version
+ modibmrperf_la_LIBADD = $(top_builddir)/libmetrics/libmetrics.la
+ 
+ EXTRA_DIST = ../conf.d/ibmrperf.conf
+ endif
+ 
+ INCLUDES = @APR_INCLUDES@
+ 
*** ./gmond/modules/ibmrperf/mod_ibmrperf-aix.c.ORIG	Tue May 22 14:59:23 2012
--- ./gmond/modules/ibmrperf/mod_ibmrperf-aix.c	Tue May 22 14:45:28 2012
***************
*** 0 ****
--- 1,1510 ----
+ /******************************************************************************
+  *
+  *  This module implements a rPerf calculated metric for IBM systems.
+  *  Based on the calculated rPerf value also an approximated SPECint_rate2006
+  *  value is calculated.
+  *
+  *  rPerf itself is described at:
+  *     http://www-03.ibm.com/systems/power/hardware/notices/rperf.html
+  *
+  *  For more discussion on rPerf please see
+  *     http://www.ibm.com/developerworks/wikis/display/WikiPtype/rperf
+  *
+  *  The libperfstat API is used and it can deal with a 32-bit and a 64-bit
+  *  kernel and does not require root authority.
+  *
+  *  The code has been tested with AIX 5.1, AIX 5.2, AIX 5.3, AIX 6.1 and AIX 7.1
+  *  on different hardware systems.
+  *
+  *  Only the following publically available documents were used:
+  *    - http://www-03.ibm.com/systems/power/hardware/reports/factsfeatures.html
+  *        - IBM POWER7 systems facts and features (11/2011 version)
+  *        - IBM POWER7 systems facts and features (06/2011 version)
+  *        - IBM POWER7 systems facts and features (10/2010 version)
+  *        - IBM Power Systems facts and features (04/2010 version)
+  *   - http://www-03.ibm.com/systems/power/hardware/reports/system_perf.html
+  *        - IBM Power Systems Performance Report (04/2012 version)
+  *        - IBM Power Systems Performance Report (10/2010 version)
+  *        - IBM Power Systems Archive Performance Report (08/2008 version)
+  *
+  *  Written by Michael Perzl (michael@perzl.org)
+  *
+  *  Version: 1.3, May 16, 2012
+  *
+  *  Version 1.3: May 16, 2012
+  *                - included the updated p7 710, 720, 730, 740 C-models
+  *                - included the updated p7 770 and 780 C-models
+  *                - included the new 7R2 systems
+  *                - included the new PureFlex systems (p260, p460, p24L)
+  *
+  *  Version 1.2:  Aug 08, 2011
+  *                - included the updated p7 750 and 755 models
+  *                - included the new p7 PS703 and PS704 blades
+  *
+  *  Version 1.1:  Oct 28, 2010
+  *                - included the new p7 710, 720, 730, 740 and 795 models
+  *                - included the new p7 PS700, PS701 and PS702 blades
+  *
+  *  Version 1.0:  Mar 29, 2010
+  *                - initial version
+  *
+  ******************************************************************************/
+ 
+ /******************************************************************************
+  *
+  *  Remarks:
+  *  ========
+  *
+  *    - For older systems only values of ROLTP are published.
+  *         
+  *    - Later systems only have rPerf values published.
+  *         
+  *    - No official conversion factor between ROLTP and rPerf exists.
+  *         
+  *    - Fortunately, the IBM Power Systems Archive Performance Report of 08/2008,
+  *      published at
+  *      http://www-03.ibm.com/systems/power/hardware/reports/system_perf.html
+  *      contains ROLTP values for 7017-S80 and rPerf values for p680 which
+  *      happen to be the same system :-) .
+  *
+  *    - Calculation of ROLTP-->rPerf conversion factor:
+  *      Here are the published values:
+  *
+  *        450 MHz 7017-S80:
+  *          ROLTP:  6/161.7   12/306.7   18/428.7   24/544.3
+  *          rPerf:  6/  6.14  12/ 11.66  18/ 16.29  24/ 20.27
+  *          ratio:  6/26.336  12/26.304  18/26.317  24/26.852
+  *
+  *        600 MHz 7017-S80:
+  *          ROLTP:  6/219.0   12/416.0   18/583.3   24/736.9
+  *          rPerf:  6/  8.23  12/ 15.63  18/ 21.91  24/ 27.65
+  *          ratio:  6/26.610  12/26.615  18/26.623  24/26.651
+  *
+  *      Thus, averaging the ratios above, the derived conversion factor is:
+  *
+  *            1 rPerf = 26.5385 ROLTP
+  *
+  *    - Please note that this ratio is just an estimate and is used only to
+  *      calculate rPerf values for IBM systems which have withdrawn from marketing
+  *      for years now.
+  *
+  *    - Based on the calculated rPerf value then an approximation for the
+  *      equivalent SPECint_rate2006 value is derived based on the published
+  *      SPECint values.
+  *      If no published value exists then a similar hardware system is used and
+  *      the ratio of rPerf values is used for an approximation of the SPECint
+  *      value.
+  *
+  ******************************************************************************/
+ 
+ 
+ /*
+  * The ganglia metric "C" interface, required for building DSO modules.
+  */
+ 
+ #include <gm_metric.h>
+ 
+ 
+ #include <stdlib.h>
+ #include <strings.h>
+ #include <time.h>
+ 
+ #include <ctype.h>
+ #include <utmp.h>
+ #include <stdio.h>
+ #include <sys/types.h>
+ #include <procinfo.h>
+ #include <signal.h>
+ #include <odmi.h>
+ #include <cf.h>
+ #include <sys/utsname.h>
+ 
+ #if !defined(_AIX43)
+ #include <sys/dr.h>
+ #endif
+ #include <sys/systemcfg.h>
+ 
+ #include <libperfstat.h>
+ 
+ #include "libmetrics.h"
+ 
+ 
+ #ifndef FALSE
+ #define FALSE (0)
+ #endif
+ #ifndef TRUE
+ #define TRUE (1)
+ #endif
+ 
+ 
+ #define MAX_STRING_LENGTH 256
+ 
+ #define MAX_SYSID_LENGTH 16
+ 
+ #define MAX_PROC_PERF_ENTRIES 8
+ 
+ #define MAX_RPERF_MACHINE_ENTRIES 223
+ #define MAX_ROLTP_MACHINE_ENTRIES 95
+ 
+ #define MAX_LOOKUP_ENTRIES (MAX_RPERF_MACHINE_ENTRIES + MAX_ROLTP_MACHINE_ENTRIES - 1)
+ 
+ /* define the ROLTP to rPerf conversion factor, explanation see above */
+ #define ROLTP_TO_RPERF 26.5385
+ 
+ /* define the "standard" SPECint_rate2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spir (60.9/20.13)
+ 
+ /* define the "standard" SPECint_rate_base2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spib (53.2/20.13)
+ 
+ /* define the "standard" SPECfp_rate2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spfr (58.0/20.13)
+ 
+ /* define the "standard" SPECfp_rate_base2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spfb (51.5/20.13)
+ 
+ /* define the maximum time interval between successive system checks */
+ #define MAX_CHECKSYSTEM_TIME (300.0)
+ 
+ /* define the minimum time interval between successive rPerf measurements */
+ #define MIN_DELAY_TIME (5.0)
+ 
+ 
+ static time_t boottime = 0;
+ 
+ static char modelName[MAX_STRING_LENGTH];
+ 
+ static int nWayCores = -1;
+ 
+ static int nWaySMT;
+ 
+ static int tableIndex;
+ 
+ 
+ typedef struct ProcPerf {
+     int    cores;
+     double rperf;
+ } ProcPerf_t;
+ 
+ typedef struct MachineInfo {
+     char       name[MAX_SYSID_LENGTH];
+     int        speed;
+     double     SPECint_rate2006,
+                SPECint_rate_base2006,
+ 	       SPECfp_rate2006,
+ 	       SPECfp_rate_base2006;
+     ProcPerf_t value[MAX_PROC_PERF_ENTRIES];
+ } MachineInfo_t;
+ 
+ MachineInfo_t LookupInfo[MAX_LOOKUP_ENTRIES];
+ 
+ MachineInfo_t rPerf_Info[MAX_RPERF_MACHINE_ENTRIES] =
+ {
+   { "IBM,7017-S80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,6.14}, {12,11.66}, {18,16.29}, {24,20.27}, { 0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S85",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,5.6},  { 6, 8.23}, {12,15.63}, {18,21.91}, {24,27.65}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-6F0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F0",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-6F1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F1",  668, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,7.46}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-6F1",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {6,8.23}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-6H0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H0",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-6H1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H1",  668, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,7.46}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-6H1",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {6,8.23}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-6M1",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.49}, {4,4.42}, {0, 0.0},  {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-6M1",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,3.71}, {4,6.68}, {6,10.14}, {8,13.28}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-B80",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {3,2.55}, {4,3.47}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-B80",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,3.59}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8 MB L2 cache */
+   { "IBM,7026-B80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,4.01}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-M80",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.49}, {4,4.42}, {6, 6.49}, {8, 8.53}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-M80",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,3.71}, {4,6.68}, {6,10.14}, {8,13.28}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7028-6C1",  333, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.92}, {2,1.77}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6C1",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6C1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.19}, {2,2.27}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   
+   { "IBM,7028-6E1",  333, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.92}, {2,1.77}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6E1",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6E1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.19}, {2,2.27}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7028-6C4", 1000, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.72}, {2,3.68}, {4,7.12}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6C4", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0},  {4,8.05}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6C4", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.94}, {2,4.41}, {4,8.69}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+ 
+   { "IBM,7028-6E4", 1000, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.72}, {2,3.68}, {4,7.12}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6E4", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0},  {4,8.05}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6E4", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.94}, {2,4.41}, {4,8.69}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+ 
+   { "IBM,7029-6C3", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7029-6C3", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.41}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7029-6E3", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7029-6E3", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.41}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* p185 */
+   { "IBM,7037-A50", 2500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.48}, {2,4.34}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check */
+ 
+ /* POWER4 650 */
+   { "IBM,7038-6M2", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.0},  {4,8.05}, {6,11.77}, {8,15.49}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7038-6M2", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.47}, {4,9.12}, {6,13.47}, {8,18.67}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER4 655 */
+   { "IBM,7039-651", 1100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,12.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7039-651", 1300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4, 9.05}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7039-651", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,21.87}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7039-651", 1700, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,15.22}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER4 670 */
+   { "IBM,7040-671", 1100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,10.18}, {8,18.02}, {16,34.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-671", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,13.66}, {8,24.18}, {16,46.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER4 690 */
+   { "IBM,7040-681", 1100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,18.02}, {16,34.66}, {24,48.11}, {32, 60.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,21.20}, {16,40.92}, {24,56.46}, {32, 71.44}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,24.18}, {16,46.79}, {24,64.99}, {32, 81.95}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1700, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,27.11}, {16,52.45}, {24,72.86}, {32, 92.19}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,30.63}, {16,59.26}, {24,82.32}, {32,104.17}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7043-150",  250, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.18}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-150",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.26}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7043-170",  333, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.58}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-170",  400, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.73}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-170",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+  
+   { "IBM,7044-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {3,2.55}, {4,3.47}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7044-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,3.59}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8 MB L2 cache */
+   { "IBM,7044-270",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,4.01}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7046-B50",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.26}, {0,0.0}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 185, we assume the same values as for "IBM,7037-A50" */
+   { "IBM,7047-185", 2500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.48}, {2,4.34}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 185, no value */
+ 
+ /* POWER6-based JS23/JS43 Blade */
+   { "IBM,7778-23X", 4204, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {4,36.28}, {8,68.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7-based PS703, PS704 Blades, assume the same values as for PS700, PS701 and PS702 */
+   { "IBM,7891-73X", 2400, 520.0/154.36, 456.0/154.36, 434.0/154.36, 417.0/154.36, { {16,134.11}, { 0,  0.0 }, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7891-74X", 2400, 520.0/154.36, 456.0/154.36, 778.0/251.45, 710.0/251.45, { {16,134.11}, {32,251.45}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6-based JS12 Blade */
+   { "IBM,7998-60X", 3826, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PureFlex System p24L */
+   { "IBM,1457-7FL", 3220, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,1457-7FL", 3550, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,1457-7FL", 3700, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* PureFlex System p260, as there are no SPECcpu values published we assume the values of the hardware identical p7 750 B-Model */
+   { "IBM,7895-22X", 3220, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {16,163.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-22X", 3300, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { { 8, 92.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-22X", 3550, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {16,176.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PureFlex System p460, as there are no SPECcpu values published we assume the values of the hardware identical p7 750 B-Model */
+   { "IBM,7895-42X", 3220, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {32,307.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-42X", 3300, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {16,174.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-42X", 3550, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {32,331.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6-based JS22 Blade */
+   { "IBM,7998-61X", 4005, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {4,30.26}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7998-61X", 4204, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {4,36.28}, {8,68.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 720 Express B-Model, no SPECint/fp value published, we assume the same values as for p7 710 @ 3.0 GHz */
+   { "IBM,8202-E4B", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4,45.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8202-E4B", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {6,65.52}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+   { "IBM,8202-E4B", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8,81.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+ 
+ /* POWER7 720 Express C-Model, no SPECint/fp value published, we assume the same values as for p7 710 @ 3.0 GHz */
+   { "IBM,8202-E4C", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4,45.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8202-E4C", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {6,65.52}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+   { "IBM,8202-E4C", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8,81.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+ 
+ /* POWER6 520 */
+   { "IBM,8203-E4A", 4204,  90.6/31.48,  82.3/31.48,  80.8/31.48, 71.4/31.48, { {1, 8.39}, {2,15.95}, {4,31.48}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8203-E4A", 4700, 124.0/39.73, 101.0/39.73, 105.0/39.73, 88.7/39.73, { {2,20.13}, {4,39.73}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6 550 */
+   { "IBM,8204-E8A", 3500, 179.0/58.8, 152.0/58.8, 154.0/58.8, 135.0/58.8, { {2,15.85}, {4,31.27}, {6,45.04}, {8,58.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8204-E8A", 4204, 212.0/68.2, 179.0/68.2, 178.0/68.2, 156.0/68.2, { {2,18.38}, {4,36.28}, {6,52.24}, {8,68.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8204-E8A", 5000, 263.0/78.6, 215.0/78.6, 222.0/78.6, 188.0/78.6, { {2,21.18}, {4,41.81}, {6,60.2},  {8,78.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 740 Express B-Model, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.55 GHz model */
+   { "IBM,8205-E6B", 3300, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,48.33}, { 8, 92.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6B", 3550, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {8,91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6B", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,52.93}, { 8,101.62}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8205-E6B", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 740 Express C-Model, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.55 GHz model */
+   { "IBM,8205-E6C", 3300, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,48.33}, { 8, 92.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6C", 3550, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {8,91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6C", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,52.93}, { 8,101.62}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8205-E6C", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 710 and 730 Express B-Model, for 3.55 GHz clock speed we use the SPECint/fp values for 16 cores */
+   { "IBM,8231-E2B", 3000, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4, 45.13}, { 8, 86.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2B", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8, 91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2B", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {8,102.62}, { 0,  0.0 }, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8231-E2B", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6, 76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 710 Express C-Model, for 3.55 GHz clock speed we use the SPECint/fp values for 16 cores */
+   { "IBM,8231-E1C", 3000, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4, 45.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8231-E1C", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8, 91.96}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8231-E1C", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6, 76.69}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 730 Express C-Model, for 3.55 GHz clock speed we use the SPECint/fp values for 16 cores */
+   { "IBM,8231-E2C", 3000, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4, 45.13}, { 8, 86.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2C", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8, 91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2C", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {8,102.62}, { 0,  0.0 }, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8231-E2C", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6, 76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 750 Express, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.0 GHz model */
+   { "IBM,8233-E8B", 3000, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { { 8, 81.24}, {16,155.99}, {24,224.23}, {32,292.47}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8233-E8B", 3300, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { { 8, 86.99}, {16,167.01}, {24,240.08}, {32,313.15}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8233-E8B", 3300, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { { 6, 70.07}, {12,134.54}, {18,193.4},  {24,252.26}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+   { "IBM,8233-E8B", 3550, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {32,331.06}, { 0,  0.0},  { 0,  0.0},  { 0,  0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 750 refreshed, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.6 GHz model */
+   { "IBM,8233-E8B", 3200, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 8, 85.29}, {16,163.75}, {24,235.39}, {32,307.03}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8233-E8B", 3600, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 8, 93.05}, {16,178.65}, {24,256.81}, {32,334.97}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8233-E8B", 3700, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 4, 52.9},  { 8,101.57}, {12,146.0},  {16,190.44}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8233-E8B", 3700, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 6, 76.71}, {12,147.27}, {18,211.71}, {24,276.14}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER6 560Q */
+   { "IBM,8234-EMA", 3600, 363.0/100.3, 289.0/100.3, 263.0/100.3, 226.0/100.3, { {4,31.32}, {8,57.32}, {16,100.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 755, we assume the same performance as 8233-E8B @ 3.3 GHz with 32 cores */
+   { "IBM,8236-E8C", 3300, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { {32,313.15}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p7-755, no value */
+ 
+ /* POWER7 755 refreshed, we assume the same performance as 8233-E8B @ 3.6 GHz with 32 cores */
+   { "IBM,8236-E8C", 3600, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { {32,334.97}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p7-755, no value */
+ 
+ /* POWER7 7R2 B-Model */
+   { "IBM,8246-L2B", 3300, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8246-L2B", 3720, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 7R2 C-Model */
+   { "IBM,8246-L2C", 3300, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4,45.13}, { 8, 86.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8246-L2C", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8,91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7-based PS700, PS701, PS702 Blades */
+   { "IBM,8406-70Y", 3000, 520.0/154.36, 456.0/154.36, 434.0/154.36, 417.0/154.36, { {4,45.13}, { 0,  0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8406-71Y", 3000, 520.0/154.36, 456.0/154.36, 434.0/154.36, 417.0/154.36, { {8,81.24}, {16,154.36}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PowerPC970-based JS20 Blade */
+   { "IBM,8842-21X", 1600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.53}, {2,2.65}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8842-41X", 2200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.95}, {2,3.4},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PowerPC970-based JS21 Blade */
+   { "IBM,8844-41Y", 2300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,8.15}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8844-51Y", 2500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,8.72}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8844-31Y", 2700, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,5.31}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* RS/6000 SP POWER3 Thin Node */
+   { "IBM,9076-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,2.64}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9076-270",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,2.95}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* RS/6000 SP POWER3 Wide Node */
+   { "IBM,9076-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,3.59}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9076-270",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,4.01}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* RS/6000 SP POWER3 High Node */
+   { "IBM,9076-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,3.07}, {8,6.03}, {12,9.11}, {16,12.01}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 510 */
+   { "IBM,9110-510", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9110-510", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9110-510", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,5.24}, {2,9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5+ 510 */
+   { "IBM,9110-51A", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.75}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9110-51A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,20.75}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9110-51A", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 6.11}, {2,11.49}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9110-51A", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 6.63}, {2,12.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 285, we assume the same performance as "IBM,9133-55A" */
+   { "IBM,9111-285", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 285, no value */
+ 
+ /* POWER5 520 */
+   { "IBM,9111-520", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9111-520", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9111-520", 1654, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 265, we assume the same performance as "IBM,7028-6E1" */
+   { "IBM,9112-265",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 265, no value */
+ 
+ /* POWER5 550 */
+   { "IBM,9113-550", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9113-550", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {4,18.2},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9113-550", 1654, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.86}, {4,19.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 275, we assume the same performance as "IBM,7028-6E4" */
+   { "IBM,9114-275", 1000, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.72}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 275, no value */
+   { "IBM,9114-275", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.94}, {2,4.41}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 275, no value */
+ 
+ /* POWER5 505 and POWER5+ 505 */
+   { "IBM,9115-505", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9115-505", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.51}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9115-505", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9115-505", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,20.25}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9115-505", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.1},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9115-505", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.49}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9115-505", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,12.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 560Q and POWER5+ 560Q */
+   { "IBM,9116-561", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.75}, {8,35.5},  {16,65.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9116-561", 1800, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,21.72}, {8,41.12}, {16,75.58}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+ 
+ /* POWER5 570 and POWER5+ 570 */
+   { "IBM,9117-570", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.13}, {4,18.2},  {8,34.46}, { 0, 0.0},  { 0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-570", 1654, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.86}, {4,19.66}, {8,37.22}, {12,53.43}, {16,68.4},  {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-570", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {4,22.26}, {8,42.14}, {12,60.5},  {16,77.45}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* dual-core */
+   { "IBM,9117-570", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,12.27}, {4,24.48}, {8,46.36}, {12,66.55}, {16,85.2},  {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9117-570", 2197, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,13.83}, {4,27.58}, {8,52.21}, {12,74.95}, {16,95.96}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6 570 and POWER6+ 570 */
+   { "IBM,9117-MMA", 3504, 478.0/134.35, 410.0/134.35, 426.0/134.35, 379.0/134.35, { {2,15.85}, {4,31.69}, { 8, 58.95}, {12, 83.35}, {16,105.75}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMA", 4208, 478.0/134.35, 410.0/134.35, 426.0/134.35, 379.0/134.35, { {2,18.38}, {4,36.76}, { 8, 68.38}, {12, 96.68}, {16,122.67}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* dual-core */
+   { "IBM,9117-MMA", 4208, 832.0/193.25, 661.0/193.25, 602.0/193.25, 517.0/193.25, { {4,35.5},  {8,64.96}, {16,113.68}, {24,153.46}, {32,193.25}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9117-MMA", 4400, 542.0/141.21, 466.0/141.21, 544.0/141.21, 465.0/141.21, { {2,19.08}, {4,38.16}, { 8, 70.97}, {12,100.35}, {16,127.32}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMA", 4704, 478.0/134.35, 410.0/134.35, 426.0/134.35, 379.0/134.35, { {2,20.13}, {4,40.26}, { 8, 74.89}, {12,105.89}, {16,134.35}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMA", 5000, 542.0/141.21, 466.0/141.21, 544.0/141.21, 465.0/141.21, { {2,21.16}, {4,42.32}, { 8, 78.71}, {12,111.3},  {16,141.21}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 770 B-Model */
+   { "IBM,9117-MMB", 3108, 2140.0/579.39, 1930.0/579.39, 1900.0/579.39, 1710.0/579.39, { {16,165.3},  {32,306.74}, {48,443.06}, {64,579.39}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMB", 3500, 1930.0/493.37, 1740.0/493.37, 1760.0/493.37, 1560.0/493.37, { {12,140.75}, {24,261.19}, {36,377.28}, {48,493.37}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 770 C-Model, no new SPECcpu2006 values published, assume same SPECcpu/rPerf ratio as p7 770 B-Model */
+   { "IBM,9117-MMC", 3304, 2140.0/579.39, 1930.0/579.39, 1900.0/579.39, 1710.0/579.39, { {16,173.1}, {32,321.2}, {48,464.0}, {64,606.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMC", 3720, 1930.0/493.37, 1740.0/493.37, 1760.0/493.37, 1560.0/493.37, { {12,147.5}, {24,273.7}, {36,395.4}, {48,517.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 575, we assume the same performance as "IBM,9117-570" (POWER5-based) */
+   { "IBM,9118-575", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16,2*34.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p5-575, no value */
+   { "IBM,9118-575", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { { 8,42.14},   {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p5-575, no value */
+ 
+ /* POWER5 590 and POWER5+ 590 */
+   { "IBM,9119-590", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,41.68}, {16, 80.86}, {24,116.29}, {32,151.72}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9119-590", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,55.75}, {16,108.13}, {24,155.51}, {32,202.88}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 595 and POWER5+ 595 */
+   { "IBM,9119-595", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16, 80.86}, {24,116.29}, {32,151.72}, {40,182.07}, {48,212.41}, {56,242.76}, {64,273.1},  {0,0.0} } },
+   { "IBM,9119-595", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16, 90.67}, {24,130.39}, {32,170.11}, {40,204.14}, {48,238.16}, {56,272.18}, {64,306.21}, {0,0.0} } },
+   { "IBM,9119-595", 2101, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16,108.13}, {24,155.51}, {32,202.88}, {40,243.46}, {48,284.04}, {56,324.61}, {64,365.19}, {0,0.0} } },
+   { "IBM,9119-595", 2300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16,116.13}, {24,167.58}, {32,218.64}, {40,262.37}, {48,306.1},  {56,349.83}, {64,393.55}, {0,0.0} } },
+ 
+ /* POWER6 595 */
+   { "IBM,9119-FHA", 4200, 1650.0/479.89, 1420.0/479.89, 2108.0/553.01, 1822.0/553.01, { {8,75.58}, {16,142.9},  {24,204.7}, {32,266.51}, {40,320.05}, {48,373.6},  {56,426.74}, {64,479.89} } },
+   { "IBM,9119-FHA", 5000, 2083.0/553.01, 1822.0/553.01, 2108.0/553.01, 1822.0/553.01, { {8,87.1},  {16,164.67}, {24,235.9}, {32,307.12}, {40,368.82}, {48,430.53}, {56,491.77}, {64,553.01} } },
+ 
+ /* POWER7 795 */
+   { "IBM,9119-FHB", 3700, 11200.0/2978.16, 9880.0/2978.16, 10500.0/2978.16, 9730.0/2978.16, { {24,273.51}, {48,547.02}, {72, 820.53}, { 96,1094.04}, {120,1367.55}, {144,1641.06}, {168,1914.57}, {192,2188.08} } },
+   { "IBM,9119-FHB", 4000, 11200.0/2978.16, 9880.0/2978.16, 10500.0/2978.16, 9730.0/2978.16, { {32,372.27}, {64,744.54}, {96,1116.81}, {128,1489.08}, {160,1861.35}, {192,2233.62}, {224,2605.89}, {256,2978.16} } },
+   { "IBM,9119-FHB", 4250,  6150.0/1852.56, 5330.0/1852.56,  5870.0/1852.56, 5450.0/1852.56, { {24,347.36}, {32,463.14}, {48, 694.71}, { 64, 926.28}, { 80,1157.85}, { 96,1389.42}, {112,1620.99}, {128,1852.56} } },
+ 
+ /* OpenPower 710, no values are published but those are the same machines as 9110-510, therefore we use those values */
+   { "IBM,9123-710", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,5.24}, {2,9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* OpenPower 720, no values are published but those are the same machines as 9113-550, therefore we use those values */
+   { "IBM,9124-720", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9124-720", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {4,18.2},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9124-720", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.86}, {4,19.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6 575, no published value, assume double the performance of "IBM,9117-MMA" @ 4.7 GHz */
+   { "IBM,9125-F2A", 4704, 478.0/(2*134.35), 410.0/(2*134.35), 426.0/(2*134.35), 379.0/(2*134.35), { {32,2*134.35}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p6-575, no value */
+ 
+ /* POWER5+ 520 */
+   { "IBM,9131-52A", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.75}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9131-52A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.62}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9131-52A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,10.15}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* dual-core */
+   { "IBM,9131-52A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,20.25}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9131-52A", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9131-52A", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 6.63}, {2,12.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5+ 550 */
+   { "IBM,9133-55A", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.2},  {8,34.46}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9133-55A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,10.15}, {4,20.25}, {8,38.34}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9133-55A", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {4,22.26}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9133-55A", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,12.46}, {4,24.86}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 Model 780 B-Model */
+   { "IBM,9179-MHB", 3860, 2530.0/685.09, 2300.0/685.09, 2240.0/685.09, 2030.0/685.09, { {16,195.45}, {32,362.7},  {48,523.89}, {64,685.09}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9179-MHB", 4150, 1460.0/425.5,  1300.0/425.5,  1300.0/425.5,  1190.0/425.5,  { { 8,115.16}, {16,226.97}, {24,326.24}, {32,425.5},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 Model 780 C-Model */
+   { "IBM,9179-MHC", 3440, 3520.0/886.6, 3070.0/886.6, 3150.0/886.6, 2840.0/886.6, { {24,253.3}, {48,443.3}, {72,696.6}, {96,886.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9179-MHC", 3920, 2770.0/692.5, 2420.0/692.5, 2640.0/692.5, 2410.0/692.5, { {16,197.6}, {32,366.6}, {48,529.6}, {64,692.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9179-MHC", 4150, 1460.0/425.5, 1300.0/425.5, 1300.0/425.5, 1190.0/425.5, { { 8,115.9}, {16,227.0}, {24,326.2}, {32,425.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "Unknown System",  0, rp_spir, rp_spib, rp_spfr, rp_spfb, { {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } }
+ };
+ 
+ 
+ static MachineInfo_t ROLTP_Info[MAX_ROLTP_MACHINE_ENTRIES] =
+ {
+   { "IBM,7009-C10",   80, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7009-C20",  120, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7011-220",   33, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-230",   45, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-23S",   45, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-250",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-25S",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7012-320",   20, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-32H",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.4}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-340",   33, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-34H",   42, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-350",   41, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-360",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.9}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-370",   62, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-380",   59, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-390",   67, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-39H",   67, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-397",  160, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,6.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-G30",   75, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,3.1}, {4,5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-G40",  112, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.6}, {2,4.8}, {4,8.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7013-520",   20, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-52H",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-530",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-53H",   33, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-540",   30, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-550",   41, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-55L",   42, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-560",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.9}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-570",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-580",   63, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.7}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-58H",   55, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.2}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-590",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.9}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-59H",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-591",   77, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-595",  135, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 5.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-J30",   75, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 4.5}, {4, 7.5}, {6,10.3}, {8,11.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-J40",  112, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 5.8}, {4,10.0}, {6,14.5}, {8,19.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-J50",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.3}, {4,17.0}, {6,23.8}, {8,30.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-930",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-950",   41, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-970",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-97B",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-980",   63, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.7}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-98B",   63, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.7}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-990",   72, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R10",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.6}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R20",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R21",   77, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R24",   72, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.9}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R30",   75, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 4.5}, {4, 7.5}, {6,10.3}, {8,11.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R40",  112, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 5.8}, {4,10.0}, {6,14.5}, {8,19.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R50",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,17.0}, {6,23.8}, {8,30.6}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S70",  125, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,24.2}, {8,46.3}, {12, 62.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7017-S70",  262, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,46.0}, {8,82.7}, {12,113.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S7A",  262, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,52.7}, {8,98.7}, {12,136.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,161.7}, {12,306.7}, {18,428.7}, {24,533.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7017-S80",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,219.0}, {12,416.0}, {18,583.3}, {24,736.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7024-E20",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E20",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E20",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7024-E30",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E30",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E30",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,4.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F30",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F30",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F40",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {2,4.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F40",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {2,5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F50",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 8.2}, {2,14.9}, {3,21.0}, {4,27.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F50",  332, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,10.0}, {2,17.9}, {3,25.2}, {4,32.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 23.0}, {2,50.0}, {4,87.7},  {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F80",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,111.9}, {0, 0.0}, {0, 0.0},  {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F80",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 32.3}, {2,69.0}, {4,117.0}, {6,191.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H10",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H50",  332, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,10.0}, {2,17.9}, {3,25.2}, {4,32.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H70",  340, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,16.7}, {2,31.9}, {3,44.5}, {4,57.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 23.0}, {2,50.0}, {4, 87.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-H80",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,111.9}, {0, 0.0}, {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-H80",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 32.3}, {2,69.0}, {4,117.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-H80",  668, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,191.2}, {0, 0.0}, {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7043-140",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 2.9}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.6}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140u", 233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.6}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140n", 233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.9}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140",  332, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 5.3}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-240",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 2.8}, {2, 4.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-240",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.7}, {2, 5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-260",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,10.5}, {2,21.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7248-100",  100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7248-120",  120, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.9}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7248-132",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7248-xxxu", 166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7317-F3L",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7317-F3L",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7317-F3L",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,4.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "Unknown System",  0, rp_spir, rp_spib, rp_spfr, rp_spfb, { {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } }
+ };
+ 
+ 
+ 
+ static int
+ Find_Number_of_SMT_Threads( void )
+ {
+    FILE *f;
+    char  buf[MAX_STRING_LENGTH];
+    int   nWaySMT;
+ 
+ 
+    nWaySMT = 1;
+    strcpy( buf, "" );
+ 
+    f = popen( "/usr/sbin/lsattr -El `/usr/sbin/lsdev -Cc processor | /usr/bin/head -1 | /bin/awk '{ print $1 }'` | /bin/grep smt_enabled | /bin/awk '{ print $2 }' 2>/dev/null", "r" );
+ 
+    if (f)
+    {
+       if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+       {
+          buf[MAX_STRING_LENGTH - 1] = '\0';
+          buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+       }
+ 
+       pclose( f );
+ 
+       if (! strcmp( buf, "true" ) )
+       {
+          f = popen( "/usr/sbin/lsattr -El `/usr/sbin/lsdev -Cc processor | /usr/bin/head -1 | /bin/awk '{ print $1 }'` | /bin/grep smt_threads | /bin/awk '{ print $2 }' 2>/dev/null", "r" );
+ 
+          if (f)
+          {
+             if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+             {
+                buf[MAX_STRING_LENGTH - 1] = '\0';
+                buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+ 
+                nWaySMT = atoi( buf );
+             }
+ 
+             pclose( f );
+          }
+       }
+    }
+ 
+    return( nWaySMT );
+ }
+ 
+ 
+ 
+ static int
+ Find_nWay_Cores ( void )
+ {
+    FILE *f;
+    char  buf[MAX_STRING_LENGTH];
+    int   nWay;
+ 
+ 
+    nWay = 1;
+    strcpy( buf, "" );
+ 
+    f = popen( "/usr/sbin/lscfg -vpl sysplanar0 | /bin/grep WAY | /bin/grep PROC | /usr/bin/head -1 | /bin/awk '{ print $1 }' 2>/dev/null", "r" );
+ 
+    if (f)
+    {
+       if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+       {
+          buf[MAX_STRING_LENGTH - 1] = '\0';
+          buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+       }
+ 
+       pclose( f );
+ 
+       if (buf[0] == '2') nWay = 2;
+       else
+         if (buf[0] == '4') nWay = 4;
+       else
+         if (buf[0] == '6') nWay = 6;
+       else
+         if (buf[0] == '8') nWay = 8;
+    }
+ 
+    return( nWay );
+ }
+ 
+ 
+ 
+ static int
+ Find_L2_Cache_Size( void )
+ {
+    FILE *f;
+    char  buf[MAX_STRING_LENGTH];
+    int   L2size;
+ 
+ 
+    L2size = -1;
+    strcpy( buf, "" );
+ 
+    f = popen( "/usr/sbin/lsattr -El L2cache0 | /usr/bin/awk '{ print $2 }' 2>/dev/null", "r" );
+ 
+    if (f)
+    {
+       if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+       {
+          buf[MAX_STRING_LENGTH - 1] = '\0';
+          buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+ 
+          L2size = atoi( buf );
+       }
+ 
+       pclose( f );
+    }
+ 
+    return( L2size );
+ }
+ 
+ 
+ 
+ static int
+ Find_L2_Cache_Size_Alternative( void )
+ {
+    FILE *f;
+    char  buf[MAX_STRING_LENGTH], *p;
+    int   L2size;
+ 
+ 
+    L2size = -1;
+    strcpy( buf, "" );
+ 
+    f = popen( "/usr/sbin/lscfg -vpl sysplanar0 | /usr/bin/grep L2= | /usr/bin/head -1 | /usr/bin/sed 's/,/ /g' 2>/dev/null", "r" );
+ 
+    if (f)
+    {
+       if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+       {
+          buf[MAX_STRING_LENGTH - 1] = '\0';
+          buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+       }
+ 
+       pclose( f );
+ 
+       p = strstr( buf, "L2=" );
+ 
+       if (p)
+       {
+          p += 3;
+          while (*p == '0') p++;
+ 
+          L2size = atoi( p );
+       }
+    }
+ 
+    return( L2size );
+ }
+ 
+ 
+ 
+ static void
+ Find_Model_Name( void )
+ {
+    FILE *f;
+ 
+ 
+    strcpy( modelName, "" );
+ 
+    f = popen( "/usr/bin/uname -M 2>/dev/null", "r" );
+ 
+    if (f != NULL)
+    {
+       if ( fgets( modelName, MAX_STRING_LENGTH, f ) != NULL )
+       {
+          modelName[MAX_STRING_LENGTH - 1] = '\0';
+          modelName[strlen( modelName ) - 1] = '\0';  /* truncate \n */
+       }
+       else
+          strcpy( modelName, "" );
+ 
+       pclose( f );
+    }
+ }
+ 
+ 
+ 
+ static int
+ Find_IBM_Model( void )
+ {
+    perfstat_cpu_total_t  c;
+    FILE                 *f;
+    char                  buf[MAX_STRING_LENGTH];
+    int                   tIndex, frequency, i, L2size;
+ 
+ 
+    tIndex = -1;
+ 
+    Find_Model_Name();
+    if (! modelName)
+       tIndex = -2;
+ 
+    frequency = 1;
+ 
+    if (tIndex == -1)
+    {
+       if (perfstat_cpu_total( NULL, &c, sizeof( perfstat_cpu_total_t ), 1 ) == -1)
+          tIndex = -2;
+       else
+       {
+ /* Convert Hz to MHz, and round up or down */
+          if ((c.processorHZ % 1000000) >= 500000)
+             frequency = (c.processorHZ / 1000000) + 1;
+          else
+             frequency = c.processorHZ / 1000000;
+       }
+    }
+ 
+    if (tIndex == -1)
+    {
+ /* handle special Blade server cases */
+ /* according to: http://www-03.ibm.com/systems/xbc/cog/Withdrawn/bcjs21/bcjs21aag.html */
+       if (! strncmp( modelName, "IBM,8844-31", 11 ))
+          strcpy( modelName, "IBM,8844-31Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-E3", 11 ))
+             strcpy( modelName, "IBM,8844-31Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-41", 11 ))
+             strcpy( modelName, "IBM,8844-41Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-51", 11 ))
+             strcpy( modelName, "IBM,8844-51Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-E5", 11 ))
+             strcpy( modelName, "IBM,8844-51Y" );
+ 
+       i = 0;
+       while (i < MAX_LOOKUP_ENTRIES - 1)
+       {
+          if ((! strcmp( modelName, LookupInfo[i].name )) &&
+              (abs( frequency - LookupInfo[i].speed ) < 5))  /* max. delta of 5 MHz */
+             break;
+ 
+          i++;
+       }
+ 
+       if (i < MAX_LOOKUP_ENTRIES)
+          tIndex = i;
+    }
+ 
+    if (tIndex >= 0)
+    {
+       frequency = LookupInfo[tIndex].speed;
+ 
+ /* obtain L2 cache size only for systems where necessary to speed things up */
+ 
+       L2size = -1;
+ 
+       if ((! strcmp( modelName, "IBM,7025-6F0" )) ||
+           (! strcmp( modelName, "IBM,7025-6F1" )) ||
+           (! strcmp( modelName, "IBM,7025-6H0" )) ||
+           (! strcmp( modelName, "IBM,7025-6H1" )) ||
+           (! strcmp( modelName, "IBM,7026-B80" )) ||
+           (! strcmp( modelName, "IBM,7044-270" )))
+       {
+          L2size = Find_L2_Cache_Size();
+ 
+          if (L2size < 0)
+             L2size = Find_L2_Cache_Size_Alternative();
+       }
+ 
+ /* check case of 7025-6F0 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6F0" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7025-6F1 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6F1" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7025-6H0 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6H0" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7025-6H1 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6H1" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7026-B80 with 8 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7026-B80" )) &&
+           (frequency == 375) &&
+           (L2size == 8192))
+          tIndex++;
+        
+ /* check case of 7044-B80 with 8 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7044-270" )) &&
+           (frequency == 375) &&
+           (L2size == 8192))
+          tIndex++;
+ 
+ /* handle cases of POWER5(+) systems without L3 cache ("low cost" version) */
+       if (((! strcmp( modelName, "IBM,9110-510" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9111-520" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9113-550" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9115-505" )) && (frequency == 1650)) ||
+           ((! strcmp( modelName, "IBM,9115-505" )) && (frequency == 1900)) ||
+           ((! strcmp( modelName, "IBM,9124-720" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9131-52A" )) && (frequency == 1650)))
+       {
+          f = popen( "/usr/bin/lparstat -i | /usr/bin/grep 'Maximum Physical CPUs in system' | /usr/bin/awk -F':' '{ print $2 }' 2>/dev/null", "r" );
+ 
+          if (f)
+          {
+             if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+             {
+                buf[MAX_STRING_LENGTH - 1] = '\0';
+                buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+ 
+                i = atoi( buf );
+ 
+                if (i > 1)
+                   tIndex++;
+             }
+ 
+             pclose( f );
+          }
+       }
+ 
+ /* we only need to find out the "n-way core property" for the */
+ /* following systems to speed up things */
+       if ((! strcmp( modelName, "IBM,8202-E4B" )) ||    /* p7 720 B-Model */
+           (! strcmp( modelName, "IBM,8202-E4C" )) ||    /* p7 720 C-Model */
+           (! strcmp( modelName, "IBM,8205-E6B" )) ||    /* p7 740 B-Model */
+           (! strcmp( modelName, "IBM,8205-E6C" )) ||    /* p7 740 C-Model */
+           (! strcmp( modelName, "IBM,8231-E2B" )) ||    /* p7 710/730 B-Model */
+           (! strcmp( modelName, "IBM,8231-E2C" )) ||    /* p7 730 C-Model */
+           (! strcmp( modelName, "IBM,8233-E8B" )) ||    /* p7 750 */
+           (! strcmp( modelName, "IBM,9117-570" )) ||
+           (! strcmp( modelName, "IBM,9117-MMA" )) ||
+           (! strcmp( modelName, "IBM,9131-52A" )))
+          nWayCores = Find_nWay_Cores();
+ 
+ /* check cases of POWER7 720 B-Model */
+       if (! strcmp( modelName, "IBM,8202-E4B" ))
+       {
+          if (nWayCores == 6) tIndex++;
+          else
+             if (nWayCores == 8) tIndex += 2;
+       }
+ 
+ /* check cases of POWER7 720 C-Model */
+       if (! strcmp( modelName, "IBM,8202-E4C" ))
+       {
+          if (nWayCores == 6) tIndex++;
+          else
+             if (nWayCores == 8) tIndex += 2;
+       }
+ 
+ /* check case of POWER7 740 B-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8205-E6B" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 740 C-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8205-E6C" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 710/730 B-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8231-E2B" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 730 C-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8231-E2C" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 750 @ 3.3GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8233-E8B" )) &&
+           (frequency == 3300) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 750 (refreshed) with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8233-E8B" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER5 9117-570 @ 1900 MHz if dual-core or quad-core */
+       if ((! strcmp( modelName, "IBM,9117-570" )) &&
+           (frequency == 1900) &&
+           (nWayCores == 4))
+          tIndex++;
+ 
+ /* check case of POWER6 9117-MMA @ 4208 MHz if dual-core or quad-core */
+       if ((! strcmp( modelName, "IBM,9117-MMA" )) &&
+           (frequency == 4208) &&
+           (nWayCores == 4))
+          tIndex++;
+ 
+ /* check case of POWER5+ 9131-52A @ 1650 MHz if dual-core or quad-core */
+       if ((! strcmp( modelName, "IBM,9131-52A" )) &&
+           (frequency == 1650) &&
+           (nWayCores == 4))
+          tIndex++;
+   }
+   else
+      tIndex = MAX_LOOKUP_ENTRIES;
+ 
+    return( tIndex );
+ }
+ 
+ 
+ 
+ /* find out the properties of the system we're running on */
+ 
+ static void
+ Find_System_Properties( void )
+ {
+    nWaySMT = Find_Number_of_SMT_Threads();
+    tableIndex = Find_IBM_Model();
+ }
+ 
+ 
+ 
+ /* calculate rPerf for 'val' with the big rPerf table via linear interpolation */
+ 
+ static float
+ rPerf_Interpolate( float val )
+ {
+    int    i;
+    double f, rPerfDiff, Numerator, Denominator;
+ 
+ 
+    i = 0;
+ 
+    while ((i < MAX_PROC_PERF_ENTRIES - 1) &&
+           (LookupInfo[tableIndex].value[i+1].cores > 0) &&
+           (val > LookupInfo[tableIndex].value[i].cores))
+       i++;
+ 
+    if (i > 0)
+    {
+       rPerfDiff = LookupInfo[tableIndex].value[i].rperf
+                     - LookupInfo[tableIndex].value[i-1].rperf;
+ 
+ /* we know that val > LookupInfo[tableIndex].value[i-1].cores */
+       Numerator = val - (float) LookupInfo[tableIndex].value[i-1].cores;
+ 
+       Denominator = (float) (LookupInfo[tableIndex].value[i].cores
+                                - LookupInfo[tableIndex].value[i-1].cores);
+ 
+       f = LookupInfo[tableIndex].value[i-1].rperf +
+             rPerfDiff * Numerator / Denominator;
+    } 
+    else
+    {
+       if (tableIndex != MAX_LOOKUP_ENTRIES - 1)  /* Unknown system */
+ /*
+  * we know that:
+  *               1) i == 0
+  *               2) val <= LookupInfo[tableIndex].value[i].cores
+  */
+          f = (val / (float) LookupInfo[tableIndex].value[i].cores) *
+                 LookupInfo[tableIndex].value[i].rperf;
+       else
+          f = 0.0;
+    }
+ 
+    return( f );
+ }
+ 
+ 
+ 
+ static float
+ rPerf_to_SPECint_rate2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECint_rate2006 );
+ }
+ 
+ static float
+ rPerf_to_SPECint_rate_base2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECint_rate_base2006 );
+ }
+ 
+ static float
+ rPerf_to_SPECfp_rate2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECfp_rate2006 );
+ }
+ 
+ static float
+ rPerf_to_SPECfp_rate_base2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECfp_rate_base2006 );
+ }
+ 
+ 
+ 
+ static float
+ Calculate_rPerf_func( void )
+ {
+    g_val_t val;
+    static float last_rPerf = 0.0;
+ #if defined(_AIX53) || defined(_AIX61)
+    perfstat_partition_total_t p;
+ 
+    lpar_info_format2_t f2;
+    static uint64_t saved_dispatch_time = 0LL;
+    longlong_t diff;
+    static double last_time = 0.0;
+    static float last_val = 0.0;
+    static double last_system_check_time = 0.0;
+    double now, delta_t;
+    struct timeval timeValue;
+    struct timezone timeZone;
+ 
+ 
+    gettimeofday( &timeValue, &timeZone );
+    now = (double) (timeValue.tv_sec - boottime) + (timeValue.tv_usec / 1000000.0);
+ 
+    delta_t = now - last_time;
+ 
+ /* obtain only every MIN_DELAY_TIME seconds the rPerf value */
+    if (delta_t < MIN_DELAY_TIME)
+      return( last_rPerf );
+ 
+ /* check every MAX_CHECKSYSTEM_TIME seconds if we are still on the same system --> LPAR Mobility */
+    if (now - last_system_check_time >= MAX_CHECKSYSTEM_TIME)
+    {
+       Find_System_Properties();
+ 
+ /* obtain time again as 'Find_System_Properties' might take some time! */
+       gettimeofday( &timeValue, &timeZone );
+       now = (double) (timeValue.tv_sec - boottime) + (timeValue.tv_usec / 1000000.0);
+ 
+       last_system_check_time = now;
+    }
+ 
+    if (lpar_get_info( LPAR_INFO_FORMAT2, &f2, sizeof( lpar_info_format2_t ) ) == -1)
+       val.f = 0.0;
+    else
+       if (perfstat_partition_total( NULL, &p, sizeof( perfstat_partition_total_t ), 1 ) == -1)
+          val.f = 0.0;
+       else
+       {
+          if ( p.type.b.shared_enabled )
+          {
+             delta_t = now - last_time;
+ 
+             if ( delta_t > 0.0 )
+             {
+                diff = f2.tot_dispatch_time - saved_dispatch_time;
+ 
+                if (diff >= 0LL)
+                   val.f = (double) diff / delta_t / 1000.0 / 1000.0 / 1000.0;
+                else
+                   val.f = last_val;
+             }
+             else
+                val.f = 0.0;
+ 
+             saved_dispatch_time = f2.tot_dispatch_time;
+          }
+          else /* dedicated LPAR/standalone system so calculate cpu_used with cpu_idle_func() */
+          {
+             val = cpu_idle_func();
+             val.f = (float) p.online_cpus * (100.0 - val.f) / 100.0;
+          }
+       }
+ 
+    last_time = now;
+    last_val = val.f;
+ #else
+    perfstat_cpu_total_t c;
+ 
+ 
+    if (perfstat_cpu_total( NULL, &c, sizeof( perfstat_cpu_total_t ), 1 ) == -1)
+       val.f = 0.0;
+    else
+    {
+       val = cpu_idle_func();
+       val.f = (float) c.ncpus_cfg * (100.0 - val.f) / 100.0;
+    }
+ #endif
+ 
+ /* now calculate the rPerf value */
+    last_rPerf = rPerf_Interpolate( val.f );
+ 
+    return( last_rPerf );
+ }
+ 
+ 
+ 
+ g_val_t
+ rperf_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = Calculate_rPerf_func();
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECint_rate2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECint_rate2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECint_rate_base2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECint_rate_base2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECfp_rate2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECfp_rate2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECfp_rate_base2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECfp_rate_base2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ 
+ 
+ static time_t
+ boottime_func_CALLED_ONCE( void )
+ {
+    time_t  boottime;
+    struct  utmp buf;
+    FILE   *utmp;
+ 
+ 
+    utmp = fopen( UTMP_FILE, "r" );
+ 
+    if (utmp == NULL)
+    {
+       /* Can't open utmp, use current time as boottime */
+       boottime = time( NULL );
+    }
+    else
+    {
+       while (fread( (char *) &buf, sizeof( buf ), 1, utmp ) == 1)
+       {
+          if (buf.ut_type == BOOT_TIME)
+          {
+             boottime = buf.ut_time;
+             break;
+         }
+       }
+ 
+       fclose( utmp );
+    }
+ 
+    return( boottime );
+ }
+ 
+ 
+ 
+ /* generate our lookup table out of the rPerf and ROLTP table */
+ 
+ static void
+ Generate_Lookup_Table( void )
+ {
+    int i, j, k;
+ 
+ 
+    j = 0;
+    for (i = 0;  i < MAX_RPERF_MACHINE_ENTRIES - 1;  i++)
+    {
+       LookupInfo[j] = rPerf_Info[i];
+       j++;
+    }
+    for (i = 0;  i < MAX_ROLTP_MACHINE_ENTRIES;  i++)
+    {
+       LookupInfo[j] = ROLTP_Info[i];
+ 
+       for (k = 0;  k < MAX_PROC_PERF_ENTRIES;  k++)
+          LookupInfo[j].value[k].rperf /= ROLTP_TO_RPERF;
+ 
+       j++;
+    }
+ }
+ 
+ 
+ 
+ /*
+  * Declare ourselves so the configuration routines can find and know us.
+  * We'll fill it in at the end of the module.
+  */
+ extern mmodule ibmrperf_module;
+ 
+ 
+ static int
+ ibmrperf_metric_init ( apr_pool_t *p )
+ {
+    int     i;
+    g_val_t val;
+ 
+ 
+    for (i = 0;  ibmrperf_module.metrics_info[i].name != NULL;  i++)
+    {
+       /* Initialize the metadata storage for each of the metrics and then
+        *  store one or more key/value pairs.  The define MGROUPS defines
+        *  the key for the grouping attribute. */
+       MMETRIC_INIT_METADATA( &(ibmrperf_module.metrics_info[i]), p );
+       MMETRIC_ADD_METADATA( &(ibmrperf_module.metrics_info[i]), MGROUP, "ibmrperf" );
+    }
+ 
+ 
+ /* generate our lookup table out of the rPerf and ROLTP table */
+ 
+    Generate_Lookup_Table();
+ 
+ 
+ /* find out the properties of the system we're running on */
+ 
+    Find_System_Properties();
+ 
+ 
+ /* initialize the routines which require a time interval */
+ 
+    boottime = boottime_func_CALLED_ONCE();
+ 
+    val = rperf_func();
+ 
+ 
+ /* return SUCCESS */
+ 
+    return( 0 );
+ }
+ 
+ 
+ 
+ static void
+ ibmrperf_metric_cleanup ( void )
+ {
+ }
+ 
+ 
+ 
+ static g_val_t
+ ibmrperf_metric_handler ( int metric_index )
+ {
+    g_val_t val;
+ 
+ /* The metric_index corresponds to the order in which
+    the metrics appear in the metric_info array
+ */
+    switch (metric_index)
+    {
+       case 0:  return( rperf_func() );
+       case 1:  return( SPECint_rate2006_func() );
+       case 2:  return( SPECint_rate_base2006_func() );
+       case 3:  return( SPECfp_rate2006_func() );
+       case 4:  return( SPECfp_rate_base2006_func() );
+       default: val.uint32 = 0; /* default fallback */
+    }
+ 
+    return( val );
+ }
+ 
+ 
+ 
+ static Ganglia_25metric ibmrperf_metric_info[] = 
+ {
+    {0, "rperf",                 15, GANGLIA_VALUE_FLOAT, "rPerf",        "both", "%.4f", UDP_HEADER_SIZE+8, "Relative Performance rPerf number"},
+    {0, "SPECint_rate2006",      15, GANGLIA_VALUE_FLOAT, "SPECint_2006", "both", "%.4f", UDP_HEADER_SIZE+8, "SPECint_rate2006 value"},
+    {0, "SPECint_rate_base2006", 15, GANGLIA_VALUE_FLOAT, "SPECint_2006", "both", "%.4f", UDP_HEADER_SIZE+8, "SPECint_rate_base2006 value"},
+    {0, "SPECfp_rate2006",       15, GANGLIA_VALUE_FLOAT, "SPECfp_2006",  "both", "%.4f", UDP_HEADER_SIZE+8, "SPECfp_rate2006 value"},
+    {0, "SPECfp_rate_base2006",  15, GANGLIA_VALUE_FLOAT, "SPECfp_2006",  "both", "%.4f", UDP_HEADER_SIZE+8, "SPECfp_rate_base2006 value"},
+    {0, NULL}
+ };
+ 
+ 
+ 
+ mmodule ibmrperf_module =
+ {
+    STD_MMODULE_STUFF,
+    ibmrperf_metric_init,
+    ibmrperf_metric_cleanup,
+    ibmrperf_metric_info,
+    ibmrperf_metric_handler,
+ };
+ 
*** ./gmond/modules/ibmrperf/mod_ibmrperf-linux.c.ORIG	Tue May 22 14:59:28 2012
--- ./gmond/modules/ibmrperf/mod_ibmrperf-linux.c	Tue May 22 14:59:08 2012
***************
*** 0 ****
--- 1,1546 ----
+ /******************************************************************************
+  *
+  *  This module implements a rPerf calculated metric for IBM systems.
+  *  Based on the calculated rPerf value also an approximated SPECint_rate2006
+  *  value is calculated.
+  *
+  *  rPerf itself is described at:
+  *     http://www-03.ibm.com/systems/power/hardware/notices/rperf.html
+  *
+  *  For more discussion on rPerf please see
+  *     http://www.ibm.com/developerworks/wikis/display/WikiPtype/rperf
+  *
+  *  The libperfstat API is used and it can deal with a 32-bit and a 64-bit
+  *  kernel and does not require root authority.
+  *
+  *  The code has been tested with RHEL4, RHEL5, SLES9, SLES10 and SLES11
+  *  on different hardware systems.
+  *
+  *  Only the following publically available documents were used:
+  *    - http://www-03.ibm.com/systems/power/hardware/reports/factsfeatures.html
+  *        - IBM POWER7 systems facts and features (11/2011 version)
+  *        - IBM POWER7 systems facts and features (06/2011 version)
+  *        - IBM POWER7 systems facts and features (10/2010 version)
+  *        - IBM Power Systems facts and features (04/2010 version)
+  *   - http://www-03.ibm.com/systems/power/hardware/reports/system_perf.html
+  *        - IBM Power Systems Performance Report (04/2012 version)
+  *        - IBM Power Systems Performance Report (10/2010 version)
+  *        - IBM Power Systems Archive Performance Report (08/2008 version)
+  *
+  *  Written by Michael Perzl (michael@perzl.org)
+  *
+  *  Version: 1.3, May 16, 2012
+  *
+  *  Version 1.3: May 16, 2012
+  *                - included the updated p7 710, 720, 730, 740 C-models
+  *                - included the updated p7 770 and 780 C-models
+  *                - included the new 7R2 systems
+  *                - included the new PureFlex systems (p260, p460, p24L)
+  *                - fixed the values for the p7 780 @ 4.14 GHz (actually 4.15 GHz)
+  *
+  *  Version 1.2:  Aug 08, 2011
+  *                - included the updated p7 750 and 755 models
+  *                - included the new p7 PS703 and PS704 blades
+  *
+  *  Version 1.1:  Oct 28, 2010
+  *                - included the new p7 710, 720, 730, 740 and 795 models
+  *                - included the new p7 PS700, PS701 and PS702 blades
+  *
+  *  Version 1.0:  Mar 29, 2010
+  *                - initial version
+  *
+  ******************************************************************************/
+ 
+ /******************************************************************************
+  *
+  *  Remarks:
+  *  ========
+  *
+  *    - For older systems only values of ROLTP are published.
+  *         
+  *    - Later systems only have rPerf values published.
+  *         
+  *    - No official conversion factor between ROLTP and rPerf exists.
+  *         
+  *    - Fortunately, the IBM Power Systems Archive Performance Report of 08/2008,
+  *      published at
+  *      http://www-03.ibm.com/systems/power/hardware/reports/system_perf.html
+  *      contains ROLTP values for 7017-S80 and rPerf values for p680 which
+  *      happen to be the same system :-) .
+  *
+  *    - Calculation of ROLTP-->rPerf conversion factor:
+  *      Here are the published values:
+  *
+  *        450 MHz 7017-S80:
+  *          ROLTP:  6/161.7   12/306.7   18/428.7   24/544.3
+  *          rPerf:  6/  6.14  12/ 11.66  18/ 16.29  24/ 20.27
+  *          ratio:  6/26.336  12/26.304  18/26.317  24/26.852
+  *
+  *        600 MHz 7017-S80:
+  *          ROLTP:  6/219.0   12/416.0   18/583.3   24/736.9
+  *          rPerf:  6/  8.23  12/ 15.63  18/ 21.91  24/ 27.65
+  *          ratio:  6/26.610  12/26.615  18/26.623  24/26.651
+  *
+  *      Thus, averaging the ratios above, the derived conversion factor is:
+  *
+  *            1 rPerf = 26.5385 ROLTP
+  *
+  *    - Please note that this ratio is just an estimate and is used only to
+  *      calculate rPerf values for IBM systems which have withdrawn from marketing
+  *      for years now.
+  *
+  *    - Based on the calculated rPerf value then an approximation for the
+  *      equivalent SPECint_rate2006 value is derived based on the published
+  *      SPECint values.
+  *      If no published value exists then a similar hardware system is used and
+  *      the ratio of rPerf values is used for an approximation of the SPECint
+  *      value.
+  *
+  ******************************************************************************/
+ 
+ 
+ /*
+  * The ganglia metric "C" interface, required for building DSO modules.
+  */
+ 
+ #include <gm_metric.h>
+ 
+ 
+ #include <stdio.h>
+ #include <stdint.h>
+ #include <string.h>
+ #include <time.h>
+ 
+ #include "gm_file.h"
+ #include "libmetrics.h"
+ 
+ 
+ #ifndef BUFFSIZE
+ #define BUFFSIZE 8192
+ #endif
+ 
+ #ifndef FALSE
+ #define FALSE (0)
+ #endif
+ #ifndef TRUE
+ #define TRUE (1)
+ #endif
+ 
+ 
+ typedef struct
+ {
+    uint32_t last_read;
+    uint32_t thresh;
+    char *name;
+    char buffer[BUFFSIZE];
+ } my_timely_file;
+ 
+ static my_timely_file proc_stat = { 0, 1, "/proc/stat" };
+ static my_timely_file proc_ppc64_lparcfg = { 0, 1, "/proc/ppc64/lparcfg" };
+ 
+ static char proc_cpuinfo[BUFFSIZE];
+ 
+ 
+ #define MAX_STRING_LENGTH 256
+ 
+ #define MAX_SYSID_LENGTH 16
+ 
+ #define MAX_PROC_PERF_ENTRIES 8
+ 
+ #define MAX_RPERF_MACHINE_ENTRIES 223
+ #define MAX_ROLTP_MACHINE_ENTRIES 95
+ 
+ #define MAX_LOOKUP_ENTRIES (MAX_RPERF_MACHINE_ENTRIES + MAX_ROLTP_MACHINE_ENTRIES - 1)
+ 
+ /* define the ROLTP to rPerf conversion factor, explanation see above */
+ #define ROLTP_TO_RPERF 26.5385
+ 
+ /* define the "standard" SPECint_rate2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spir (60.9/20.13)
+ 
+ /* define the "standard" SPECint_rate_base2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spib (53.2/20.13)
+ 
+ /* define the "standard" SPECfp_rate2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spfr (58.0/20.13)
+ 
+ /* define the "standard" SPECfp_rate_base2006 conversion factor from rPerf */
+ /* for lack of better knowledge we take the value of 9117-MMA @ 4.7 GHz with 2 cores */
+ /* as this was the first POWER6 machine available */
+ #define rp_spfb (51.5/20.13)
+ 
+ /* define the maximum time interval between successive system checks */
+ #define MAX_CHECKSYSTEM_TIME (300.0)
+ 
+ /* define the minimum time interval between successive rPerf measurements */
+ #define MIN_DELAY_TIME (5.0)
+ 
+ 
+ static time_t boottime = 0;
+ 
+ static int purrUsable = FALSE;
+ 
+ static char modelName[MAX_STRING_LENGTH];
+ 
+ static int nWayCores = -1;
+ 
+ static int nWaySMT;
+ 
+ static int tableIndex;
+ 
+ 
+ typedef struct ProcPerf {
+     int    cores;
+     double rperf;
+ } ProcPerf_t;
+ 
+ typedef struct MachineInfo {
+     char       name[MAX_SYSID_LENGTH];
+     int        speed;
+     double     SPECint_rate2006,
+                SPECint_rate_base2006,
+ 	       SPECfp_rate2006,
+ 	       SPECfp_rate_base2006;
+     ProcPerf_t value[MAX_PROC_PERF_ENTRIES];
+ } MachineInfo_t;
+ 
+ MachineInfo_t LookupInfo[MAX_LOOKUP_ENTRIES];
+ 
+ MachineInfo_t rPerf_Info[MAX_RPERF_MACHINE_ENTRIES] =
+ {
+   { "IBM,7017-S80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,6.14}, {12,11.66}, {18,16.29}, {24,20.27}, { 0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S85",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,5.6},  { 6, 8.23}, {12,15.63}, {18,21.91}, {24,27.65}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-6F0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F0",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-6F1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7025-6F1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7025-6F1",  668, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,7.46}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-6F1",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {6,8.23}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-6H0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H0",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H0",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H0",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-6H1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.93}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.02}, {4,3.55}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.26}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 2 MB L2 cache */
+   { "IBM,7026-6H1",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.69}, {4,4.57}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-6H1",  668, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,7.46}, {0,0.0},  {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-6H1",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.91}, {2,3.49}, {4,5.85}, {6,8.23}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-6M1",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.49}, {4,4.42}, {0, 0.0},  {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-6M1",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,3.71}, {4,6.68}, {6,10.14}, {8,13.28}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-B80",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {3,2.55}, {4,3.47}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7026-B80",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,3.59}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8 MB L2 cache */
+   { "IBM,7026-B80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,4.01}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-M80",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.49}, {4,4.42}, {6, 6.49}, {8, 8.53}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-M80",  750, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,3.71}, {4,6.68}, {6,10.14}, {8,13.28}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7028-6C1",  333, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.92}, {2,1.77}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6C1",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6C1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.19}, {2,2.27}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   
+   { "IBM,7028-6E1",  333, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.92}, {2,1.77}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6E1",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7028-6E1",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.19}, {2,2.27}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7028-6C4", 1000, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.72}, {2,3.68}, {4,7.12}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6C4", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0},  {4,8.05}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6C4", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.94}, {2,4.41}, {4,8.69}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+ 
+   { "IBM,7028-6E4", 1000, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.72}, {2,3.68}, {4,7.12}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6E4", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0},  {4,8.05}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+   { "IBM,7028-6E4", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.94}, {2,4.41}, {4,8.69}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check for 1 2w or 2 1w */
+ 
+   { "IBM,7029-6C3", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7029-6C3", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.41}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7029-6E3", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5},  {2,4.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7029-6E3", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.41}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* p185 */
+   { "IBM,7037-A50", 2500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.48}, {2,4.34}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* check */
+ 
+ /* POWER4 650 */
+   { "IBM,7038-6M2", 1200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.0},  {4,8.05}, {6,11.77}, {8,15.49}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7038-6M2", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,4.47}, {4,9.12}, {6,13.47}, {8,18.67}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER4 655 */
+   { "IBM,7039-651", 1100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,12.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7039-651", 1300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4, 9.05}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7039-651", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,21.87}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7039-651", 1700, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,15.22}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER4 670 */
+   { "IBM,7040-671", 1100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,10.18}, {8,18.02}, {16,34.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-671", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,13.66}, {8,24.18}, {16,46.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER4 690 */
+   { "IBM,7040-681", 1100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,18.02}, {16,34.66}, {24,48.11}, {32, 60.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,21.20}, {16,40.92}, {24,56.46}, {32, 71.44}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,24.18}, {16,46.79}, {24,64.99}, {32, 81.95}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1700, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,27.11}, {16,52.45}, {24,72.86}, {32, 92.19}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7040-681", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,30.63}, {16,59.26}, {24,82.32}, {32,104.17}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7043-150",  250, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.18}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-150",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.26}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7043-170",  333, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.58}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-170",  400, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.73}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-170",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+  
+   { "IBM,7044-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0},  {2,1.92}, {3,2.55}, {4,3.47}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4 MB L2 cache */
+   { "IBM,7044-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,3.59}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8 MB L2 cache */
+   { "IBM,7044-270",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,4.01}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7046-B50",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.26}, {0,0.0}, {0,0.0},  {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 185, we assume the same values as for "IBM,7037-A50" */
+   { "IBM,7047-185", 2500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.48}, {2,4.34}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 185, no value */
+ 
+ /* POWER6-based JS23/JS43 Blade */
+   { "IBM,7778-23X", 4204, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {4,36.28}, {8,68.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7-based PS703, PS704 Blades, assume the same values as for PS700, PS701 and PS702 */
+   { "IBM,7891-73X", 2400, 520.0/154.36, 456.0/154.36, 434.0/154.36, 417.0/154.36, { {16,134.11}, { 0,  0.0 }, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7891-74X", 2400, 520.0/154.36, 456.0/154.36, 778.0/251.45, 710.0/251.45, { {16,134.11}, {32,251.45}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6-based JS12 Blade */
+   { "IBM,7998-60X", 3826, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PureFlex System p24L */
+   { "IBM,1457-7FL", 3220, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,1457-7FL", 3550, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,1457-7FL", 3700, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {2,14.71}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* PureFlex System p260, as there are no SPECcpu values published we assume the values of the hardware identical p7 750 B-Model */
+   { "IBM,7895-22X", 3220, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {16,163.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-22X", 3300, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { { 8, 92.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-22X", 3550, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {16,176.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PureFlex System p460, as there are no SPECcpu values published we assume the values of the hardware identical p7 750 B-Model */
+   { "IBM,7895-42X", 3220, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {32,307.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-42X", 3300, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {16,174.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7895-42X", 3550, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {32,331.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6-based JS22 Blade */
+   { "IBM,7998-61X", 4005, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {4,30.26}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7998-61X", 4204, 84.7/30.26, 77.8/30.26, 75.6/30.26, 67.8/30.26, { {4,36.28}, {8,68.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 720 Express B-Model, no SPECint/fp value published, we assume the same values as for p7 710 @ 3.0 GHz */
+   { "IBM,8202-E4B", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4,45.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8202-E4B", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {6,65.52}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+   { "IBM,8202-E4B", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8,81.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+ 
+ /* POWER7 720 Express C-Model, no SPECint/fp value published, we assume the same values as for p7 710 @ 3.0 GHz */
+   { "IBM,8202-E4C", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4,45.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8202-E4C", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {6,65.52}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+   { "IBM,8202-E4C", 3024, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8,81.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+ 
+ /* POWER6 520 */
+   { "IBM,8203-E4A", 4204,  90.6/31.48,  82.3/31.48,  80.8/31.48, 71.4/31.48, { {1, 8.39}, {2,15.95}, {4,31.48}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8203-E4A", 4700, 124.0/39.73, 101.0/39.73, 105.0/39.73, 88.7/39.73, { {2,20.13}, {4,39.73}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6 550 */
+   { "IBM,8204-E8A", 3500, 179.0/58.8, 152.0/58.8, 154.0/58.8, 135.0/58.8, { {2,15.85}, {4,31.27}, {6,45.04}, {8,58.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8204-E8A", 4204, 212.0/68.2, 179.0/68.2, 178.0/68.2, 156.0/68.2, { {2,18.38}, {4,36.28}, {6,52.24}, {8,68.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8204-E8A", 5000, 263.0/78.6, 215.0/78.6, 222.0/78.6, 188.0/78.6, { {2,21.18}, {4,41.81}, {6,60.2},  {8,78.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 740 Express B-Model, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.55 GHz model */
+   { "IBM,8205-E6B", 3300, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,48.33}, { 8, 92.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6B", 3550, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {8,91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6B", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,52.93}, { 8,101.62}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8205-E6B", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 740 Express C-Model, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.55 GHz model */
+   { "IBM,8205-E6C", 3300, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,48.33}, { 8, 92.79}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6C", 3550, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {8,91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8205-E6C", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {4,52.93}, { 8,101.62}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8205-E6C", 3700, 577.0/176.57, 510.0/176.57, 481.0/176.57, 450.0/176.57, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 710 and 730 Express B-Model, for 3.55 GHz clock speed we use the SPECint/fp values for 16 cores */
+   { "IBM,8231-E2B", 3000, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4, 45.13}, { 8, 86.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2B", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8, 91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2B", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {8,102.62}, { 0,  0.0 }, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8231-E2B", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6, 76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 710 Express C-Model, for 3.55 GHz clock speed we use the SPECint/fp values for 16 cores */
+   { "IBM,8231-E1C", 3000, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4, 45.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8231-E1C", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8, 91.96}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8231-E1C", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6, 76.69}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 730 Express C-Model, for 3.55 GHz clock speed we use the SPECint/fp values for 16 cores */
+   { "IBM,8231-E2C", 3000, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4, 45.13}, { 8, 86.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2C", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8, 91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8231-E2C", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {8,102.62}, { 0,  0.0 }, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8231-E2C", 3700, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6, 76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER7 750 Express, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.0 GHz model */
+   { "IBM,8233-E8B", 3000, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { { 8, 81.24}, {16,155.99}, {24,224.23}, {32,292.47}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8233-E8B", 3300, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { { 8, 86.99}, {16,167.01}, {24,240.08}, {32,313.15}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8233-E8B", 3300, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { { 6, 70.07}, {12,134.54}, {18,193.4},  {24,252.26}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+   { "IBM,8233-E8B", 3550, 1060.0/331.06,  949.0/331.06, 851.0/331.06, 776.0/331.06, { {32,331.06}, { 0,  0.0},  { 0,  0.0},  { 0,  0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 750 refreshed, if no SPECcpu2006 value is published assume the same SPECcpu/rPerf ratio as the 3.6 GHz model */
+   { "IBM,8233-E8B", 3200, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 8, 85.29}, {16,163.75}, {24,235.39}, {32,307.03}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8233-E8B", 3600, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 8, 93.05}, {16,178.65}, {24,256.81}, {32,334.97}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 8-core */
+   { "IBM,8233-E8B", 3700, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 4, 52.9},  { 8,101.57}, {12,146.0},  {16,190.44}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 4-core */
+   { "IBM,8233-E8B", 3700, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { { 6, 76.71}, {12,147.27}, {18,211.71}, {24,276.14}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* 6-core */
+ 
+ /* POWER6 560Q */
+   { "IBM,8234-EMA", 3600, 363.0/100.3, 289.0/100.3, 263.0/100.3, 226.0/100.3, { {4,31.32}, {8,57.32}, {16,100.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 755, we assume the same performance as 8233-E8B @ 3.3 GHz with 32 cores */
+   { "IBM,8236-E8C", 3300, 1010.0/313.15,  911.0/313.15, 825.0/313.15, 750.0/313.15, { {32,313.15}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p7-755, no value */
+ 
+ /* POWER7 755 refreshed, we assume the same performance as 8233-E8B @ 3.6 GHz with 32 cores */
+   { "IBM,8236-E8C", 3600, 1150.0/334.97, 1010.0/334.97, 985.0/334.97, 909.0/334.97, { {32,334.97}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p7-755, no value */
+ 
+ /* POWER7 7R2 B-Model */
+   { "IBM,8246-L2B", 3300, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8246-L2B", 3720, 476.0/147.24, 418.0/147.24, 423.0/147.24, 395.0/147.24, { {6,76.69}, {12,147.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 7R2 C-Model */
+   { "IBM,8246-L2C", 3300, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {4,45.13}, { 8, 86.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8246-L2C", 3550, 575.0/176.57, 507.0/176.57, 482.0/176.57, 448.0/176.57, { {8,91.96}, {16,176.57}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7-based PS700, PS701, PS702 Blades */
+   { "IBM,8406-70Y", 3000, 520.0/154.36, 456.0/154.36, 434.0/154.36, 417.0/154.36, { {4,45.13}, { 0,  0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8406-71Y", 3000, 520.0/154.36, 456.0/154.36, 434.0/154.36, 417.0/154.36, { {8,81.24}, {16,154.36}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PowerPC970-based JS20 Blade */
+   { "IBM,8842-21X", 1600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.53}, {2,2.65}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8842-41X", 2200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.95}, {2,3.4},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* PowerPC970-based JS21 Blade */
+   { "IBM,8844-41Y", 2300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,8.15}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8844-51Y", 2500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,8.72}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,8844-31Y", 2700, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,5.31}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* RS/6000 SP POWER3 Thin Node */
+   { "IBM,9076-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,2.64}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9076-270",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,2.95}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* RS/6000 SP POWER3 Wide Node */
+   { "IBM,9076-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,1.99}, {4,3.59}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9076-270",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {4,4.01}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* RS/6000 SP POWER3 High Node */
+   { "IBM,9076-270",  375, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,3.07}, {8,6.03}, {12,9.11}, {16,12.01}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 510 */
+   { "IBM,9110-510", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9110-510", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9110-510", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,5.24}, {2,9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5+ 510 */
+   { "IBM,9110-51A", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.75}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9110-51A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,20.75}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9110-51A", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 6.11}, {2,11.49}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9110-51A", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 6.63}, {2,12.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 285, we assume the same performance as "IBM,9133-55A" */
+   { "IBM,9111-285", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 285, no value */
+ 
+ /* POWER5 520 */
+   { "IBM,9111-520", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9111-520", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9111-520", 1654, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 265, we assume the same performance as "IBM,7028-6E1" */
+   { "IBM,9112-265",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,2.27}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 265, no value */
+ 
+ /* POWER5 550 */
+   { "IBM,9113-550", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9113-550", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {4,18.2},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9113-550", 1654, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.86}, {4,19.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* Intellistation 275, we assume the same performance as "IBM,7028-6E4" */
+   { "IBM,9114-275", 1000, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.72}, {0,0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 275, no value */
+   { "IBM,9114-275", 1450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.94}, {2,4.41}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* Intellistation 275, no value */
+ 
+ /* POWER5 505 and POWER5+ 505 */
+   { "IBM,9115-505", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.13}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9115-505", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.51}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9115-505", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9115-505", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,20.25}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9115-505", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.1},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9115-505", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.49}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9115-505", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,12.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 560Q and POWER5+ 560Q */
+   { "IBM,9116-561", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.75}, {8,35.5},  {16,65.24}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9116-561", 1800, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,21.72}, {8,41.12}, {16,75.58}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+ 
+ /* POWER5 570 and POWER5+ 570 */
+   { "IBM,9117-570", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.13}, {4,18.2},  {8,34.46}, { 0, 0.0},  { 0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-570", 1654, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.86}, {4,19.66}, {8,37.22}, {12,53.43}, {16,68.4},  {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-570", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {4,22.26}, {8,42.14}, {12,60.5},  {16,77.45}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* dual-core */
+   { "IBM,9117-570", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,12.27}, {4,24.48}, {8,46.36}, {12,66.55}, {16,85.2},  {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9117-570", 2197, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,13.83}, {4,27.58}, {8,52.21}, {12,74.95}, {16,95.96}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6 570 and POWER6+ 570 */
+   { "IBM,9117-MMA", 3504, 478.0/134.35, 410.0/134.35, 426.0/134.35, 379.0/134.35, { {2,15.85}, {4,31.69}, { 8, 58.95}, {12, 83.35}, {16,105.75}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMA", 4208, 478.0/134.35, 410.0/134.35, 426.0/134.35, 379.0/134.35, { {2,18.38}, {4,36.76}, { 8, 68.38}, {12, 96.68}, {16,122.67}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* dual-core */
+   { "IBM,9117-MMA", 4208, 832.0/193.25, 661.0/193.25, 602.0/193.25, 517.0/193.25, { {4,35.5},  {8,64.96}, {16,113.68}, {24,153.46}, {32,193.25}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9117-MMA", 4400, 542.0/141.21, 466.0/141.21, 544.0/141.21, 465.0/141.21, { {2,19.08}, {4,38.16}, { 8, 70.97}, {12,100.35}, {16,127.32}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMA", 4704, 478.0/134.35, 410.0/134.35, 426.0/134.35, 379.0/134.35, { {2,20.13}, {4,40.26}, { 8, 74.89}, {12,105.89}, {16,134.35}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMA", 5000, 542.0/141.21, 466.0/141.21, 544.0/141.21, 465.0/141.21, { {2,21.16}, {4,42.32}, { 8, 78.71}, {12,111.3},  {16,141.21}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 770 B-Model */
+   { "IBM,9117-MMB", 3108, 2140.0/579.39, 1930.0/579.39, 1900.0/579.39, 1710.0/579.39, { {16,165.3},  {32,306.74}, {48,443.06}, {64,579.39}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMB", 3500, 1930.0/493.37, 1740.0/493.37, 1760.0/493.37, 1560.0/493.37, { {12,140.75}, {24,261.19}, {36,377.28}, {48,493.37}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 770 C-Model, no new SPECcpu2006 values published, assume same SPECcpu/rPerf ratio as p7 770 B-Model */
+   { "IBM,9117-MMC", 3304, 2140.0/579.39, 1930.0/579.39, 1900.0/579.39, 1710.0/579.39, { {16,173.1}, {32,321.2}, {48,464.0}, {64,606.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9117-MMC", 3720, 1930.0/493.37, 1740.0/493.37, 1760.0/493.37, 1560.0/493.37, { {12,147.5}, {24,273.7}, {36,395.4}, {48,517.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 575, we assume the same performance as "IBM,9117-570" (POWER5-based) */
+   { "IBM,9118-575", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16,2*34.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p5-575, no value */
+   { "IBM,9118-575", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { { 8,42.14},   {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p5-575, no value */
+ 
+ /* POWER5 590 and POWER5+ 590 */
+   { "IBM,9119-590", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,41.68}, {16, 80.86}, {24,116.29}, {32,151.72}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9119-590", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {8,55.75}, {16,108.13}, {24,155.51}, {32,202.88}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5 595 and POWER5+ 595 */
+   { "IBM,9119-595", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16, 80.86}, {24,116.29}, {32,151.72}, {40,182.07}, {48,212.41}, {56,242.76}, {64,273.1},  {0,0.0} } },
+   { "IBM,9119-595", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16, 90.67}, {24,130.39}, {32,170.11}, {40,204.14}, {48,238.16}, {56,272.18}, {64,306.21}, {0,0.0} } },
+   { "IBM,9119-595", 2101, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16,108.13}, {24,155.51}, {32,202.88}, {40,243.46}, {48,284.04}, {56,324.61}, {64,365.19}, {0,0.0} } },
+   { "IBM,9119-595", 2300, rp_spir, rp_spib, rp_spfr, rp_spfb, { {16,116.13}, {24,167.58}, {32,218.64}, {40,262.37}, {48,306.1},  {56,349.83}, {64,393.55}, {0,0.0} } },
+ 
+ /* POWER6 595 */
+   { "IBM,9119-FHA", 4200, 1650.0/479.89, 1420.0/479.89, 2108.0/553.01, 1822.0/553.01, { {8,75.58}, {16,142.9},  {24,204.7}, {32,266.51}, {40,320.05}, {48,373.6},  {56,426.74}, {64,479.89} } },
+   { "IBM,9119-FHA", 5000, 2083.0/553.01, 1822.0/553.01, 2108.0/553.01, 1822.0/553.01, { {8,87.1},  {16,164.67}, {24,235.9}, {32,307.12}, {40,368.82}, {48,430.53}, {56,491.77}, {64,553.01} } },
+ 
+ /* POWER7 795 */
+   { "IBM,9119-FHB", 3700, 11200.0/2978.16, 9880.0/2978.16, 10500.0/2978.16, 9730.0/2978.16, { {24,273.51}, {48,547.02}, {72, 820.53}, { 96,1094.04}, {120,1367.55}, {144,1641.06}, {168,1914.57}, {192,2188.08} } },
+   { "IBM,9119-FHB", 4000, 11200.0/2978.16, 9880.0/2978.16, 10500.0/2978.16, 9730.0/2978.16, { {32,372.27}, {64,744.54}, {96,1116.81}, {128,1489.08}, {160,1861.35}, {192,2233.62}, {224,2605.89}, {256,2978.16} } },
+   { "IBM,9119-FHB", 4250,  6150.0/1852.56, 5330.0/1852.56,  5870.0/1852.56, 5450.0/1852.56, { {24,347.36}, {32,463.14}, {48, 694.71}, { 64, 926.28}, { 80,1157.85}, { 96,1389.42}, {112,1620.99}, {128,1852.56} } },
+ 
+ /* OpenPower 710, no values are published but those are the same machines as 9110-510, therefore we use those values */
+   { "IBM,9123-710", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,5.24}, {2,9.86}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* OpenPower 720, no values are published but those are the same machines as 9113-550, therefore we use those values */
+   { "IBM,9124-720", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.25}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9124-720", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.13}, {4,18.2},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9124-720", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,9.86}, {4,19.66}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER6 575, no published value, assume double the performance of "IBM,9117-MMA" @ 4.7 GHz */
+   { "IBM,9125-F2A", 4704, 478.0/(2*134.35), 410.0/(2*134.35), 426.0/(2*134.35), 379.0/(2*134.35), { {32,2*134.35}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* p6-575, no value */
+ 
+ /* POWER5+ 520 */
+   { "IBM,9131-52A", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.75}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9131-52A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.62}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* no L3 cache */
+   { "IBM,9131-52A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,10.15}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* dual-core */
+   { "IBM,9131-52A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,20.25}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },  /* quad-core */
+   { "IBM,9131-52A", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9131-52A", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 6.63}, {2,12.46}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER5+ 550 */
+   { "IBM,9133-55A", 1500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,18.2},  {8,34.46}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9133-55A", 1650, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,10.15}, {4,20.25}, {8,38.34}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9133-55A", 1900, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,11.16}, {4,22.26}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9133-55A", 2100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,12.46}, {4,24.86}, {0, 0.0},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 Model 780 B-Model */
+   { "IBM,9179-MHB", 3860, 2530.0/685.09, 2300.0/685.09, 2240.0/685.09, 2030.0/685.09, { {16,195.45}, {32,362.7},  {48,523.89}, {64,685.09}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9179-MHB", 4150, 1460.0/425.5,  1300.0/425.5,  1300.0/425.5,  1190.0/425.5,  { { 8,115.16}, {16,226.97}, {24,326.24}, {32,425.5},  {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+ /* POWER7 Model 780 C-Model */
+   { "IBM,9179-MHC", 3440, 3520.0/886.6, 3070.0/886.6, 3150.0/886.6, 2840.0/886.6, { {24,253.3}, {48,443.3}, {72,696.6}, {96,886.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9179-MHC", 3920, 2770.0/692.5, 2420.0/692.5, 2640.0/692.5, 2410.0/692.5, { {16,197.6}, {32,366.6}, {48,529.6}, {64,692.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,9179-MHC", 4150, 1460.0/425.5, 1300.0/425.5, 1300.0/425.5, 1190.0/425.5, { { 8,115.9}, {16,227.0}, {24,326.2}, {32,425.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "Unknown System",  0, rp_spir, rp_spib, rp_spfr, rp_spfb, { {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } }
+ };
+ 
+ 
+ static MachineInfo_t ROLTP_Info[MAX_ROLTP_MACHINE_ENTRIES] =
+ {
+   { "IBM,7009-C10",   80, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7009-C20",  120, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7011-220",   33, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-230",   45, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-23S",   45, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-250",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7011-25S",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7012-320",   20, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-32H",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.4}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-340",   33, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-34H",   42, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-350",   41, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-360",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,0.9}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-370",   62, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-380",   59, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-390",   67, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-39H",   67, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-397",  160, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,6.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-G30",   75, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,3.1}, {4,5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7012-G40",  112, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.6}, {2,4.8}, {4,8.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7013-520",   20, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-52H",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-530",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-53H",   33, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-540",   30, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-550",   41, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-55L",   42, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-560",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.9}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-570",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-580",   63, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.7}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-58H",   55, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.2}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-590",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.9}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-59H",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-591",   77, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-595",  135, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 5.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-J30",   75, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 4.5}, {4, 7.5}, {6,10.3}, {8,11.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-J40",  112, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 5.8}, {4,10.0}, {6,14.5}, {8,19.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-J50",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 9.3}, {4,17.0}, {6,23.8}, {8,30.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-930",   25, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7013-950",   41, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-970",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 0.8}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-97B",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-980",   63, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.7}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-98B",   63, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.7}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-990",   72, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.3}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R10",   50, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 1.6}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R20",   66, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.4}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R21",   77, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.5}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R24",   72, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 4.9}, {0, 0.0}, {0, 0.0}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R30",   75, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 4.5}, {4, 7.5}, {6,10.3}, {8,11.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R40",  112, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2, 5.8}, {4,10.0}, {6,14.5}, {8,19.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7015-R50",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,17.0}, {6,23.8}, {8,30.6}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S70",  125, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,24.2}, {8,46.3}, {12, 62.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7017-S70",  262, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,46.0}, {8,82.7}, {12,113.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S7A",  262, rp_spir, rp_spib, rp_spfr, rp_spfb, { {4,52.7}, {8,98.7}, {12,136.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7017-S80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,161.7}, {12,306.7}, {18,428.7}, {24,533.3}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7017-S80",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,219.0}, {12,416.0}, {18,583.3}, {24,736.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7024-E20",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E20",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E20",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7024-E30",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E30",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7024-E30",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,4.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F30",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F30",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F40",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {2,4.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F40",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {2,5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F50",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 8.2}, {2,14.9}, {3,21.0}, {4,27.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F50",  332, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,10.0}, {2,17.9}, {3,25.2}, {4,32.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7025-F80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 23.0}, {2,50.0}, {4,87.7},  {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F80",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,111.9}, {0, 0.0}, {0, 0.0},  {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7025-F80",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 32.3}, {2,69.0}, {4,117.0}, {6,191.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H10",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {2,5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H50",  332, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,10.0}, {2,17.9}, {3,25.2}, {4,32.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H70",  340, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,16.7}, {2,31.9}, {3,44.5}, {4,57.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7026-H80",  450, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 23.0}, {2,50.0}, {4, 87.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-H80",  500, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,111.9}, {0, 0.0}, {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-H80",  600, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 32.3}, {2,69.0}, {4,117.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7026-H80",  668, rp_spir, rp_spib, rp_spfr, rp_spfb, { {6,191.2}, {0, 0.0}, {0,  0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7043-140",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 2.9}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.6}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140u", 233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.6}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140n", 233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.9}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-140",  332, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 5.3}, {0, 0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-240",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 2.8}, {2, 4.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-240",  233, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1, 3.7}, {2, 5.2}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7043-260",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,10.5}, {2,21.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7248-100",  100, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.5}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7248-120",  120, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,1.9}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7248-132",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.1}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7248-xxxu", 166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.6}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "IBM,7317-F3L",  133, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,2.8}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7317-F3L",  166, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,3.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+   { "IBM,7317-F3L",  200, rp_spir, rp_spib, rp_spfr, rp_spfb, { {1,4.7}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } },
+ 
+   { "Unknown System",  0, rp_spir, rp_spib, rp_spfr, rp_spfb, { {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0}, {0,0.0} } }
+ };
+ 
+ 
+ 
+ static char *
+ my_update_file( my_timely_file *tf )
+ {
+    int now, rval;
+ 
+ 
+    now = time( NULL );
+    if (now - tf->last_read > tf->thresh)
+    {
+       rval = slurpfile( tf->name, tf->buffer, BUFFSIZE );
+       if (rval == SYNAPSE_FAILURE)
+       {
+          err_msg( "my_update_file() got an error from slurpfile() reading %s",
+                   tf->name );
+          return( (char *) SYNAPSE_FAILURE );
+       }
+       else
+          tf->last_read = now;
+    }
+ 
+    return( tf->buffer );
+ }
+ 
+ 
+ 
+ static int
+ Find_Number_of_SMT_Threads( void )
+ {
+    char *p;
+    int   nWaySMT, activeCPUs, CPUs;
+ 
+ 
+ /* find out number of CPUs in the system/LPAR via /proc/ppc64/lparcfg */
+ /* --> partition_active_processors should always exist */
+    p = strstr( my_update_file( &proc_ppc64_lparcfg ), "partition_active_processors=" );
+   
+    if (p)
+       activeCPUs = strtol( p+28, (char **) NULL, 10 );
+    else
+       activeCPUs = 0;
+ 
+ 
+ /* find out the number of CPUs in the system/LPAR via /proc/stat */
+    p = my_update_file( &proc_stat );
+ 
+ /* Skip initial "cpu" token and find first real cpu "cpu0" */
+    p = strstr( p+3, "cpu");
+ 
+    CPUs = 1;
+    while ((p = strstr( p+3, "cpu" )))
+       CPUs++;
+ 
+ 
+ /* number of SMT threads should now be 'activeCPUs / CPUs' */
+ 
+    if (activeCPUs > 0)
+       nWaySMT = CPUs / activeCPUs;
+    else
+       nWaySMT = 1;
+ 
+    return( nWaySMT );
+ }
+ 
+ 
+ 
+ static int
+ Find_nWay_Cores ( void )
+ {
+    FILE *f;
+    char  buf[MAX_STRING_LENGTH],
+          cmd[MAX_STRING_LENGTH];
+    int   nWay;
+ 
+ 
+    nWay = 1;
+    strcpy( buf, "" );
+    strcpy( cmd, "" );
+ 
+    f = fopen( "/sbin/lscfg", "r" );
+    if (f)
+    {
+       fclose( f );
+       strcpy( buf, "/sbin/lscfg" );
+    }
+    else
+    {
+       f = fopen( "/usr/sbin/lscfg", "r" );
+       if (f)
+       {
+          fclose( f );
+          strcpy( buf, "/usr/sbin/lscfg" );
+       }
+    }
+ 
+    if (strcmp( buf, "" ))
+    {
+       sprintf( cmd, "%s -vp | /bin/grep WAY | /bin/grep PROC | /usr/bin/head -1 | /bin/awk '{ print $1 }' 2>/dev/null", buf );
+ 
+       f = popen( cmd, "r" );
+       if (f)
+       {
+          if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+          {
+             buf[MAX_STRING_LENGTH - 1] = '\0';
+             buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+          }
+ 
+          pclose( f );
+ 
+          if (buf[0] == '2') nWay = 2;
+          else
+            if (buf[0] == '4') nWay = 4;
+          else
+            if (buf[0] == '6') nWay = 6;
+          else
+            if (buf[0] == '8') nWay = 8;
+       }
+    }
+ 
+    return( nWay );
+ }
+ 
+ 
+ 
+ static int
+ Find_L2_Cache_Size( void )
+ {
+    FILE *f;
+    char  buf[MAX_STRING_LENGTH];
+    int   L2size;
+ 
+ 
+    L2size = -1;
+    strcpy( buf, "" );
+ 
+    f = fopen( "/proc/device-tree/cpus/L2-cache/d-cache-size", "r" );
+ 
+    if (f)
+    {
+       fclose( f );
+ 
+       f = popen( "/bin/cat /proc/device-tree/cpus/L2-cache/d-cache-size | /usr/bin/hexdump -d | /usr/bin/head -1 | /bin/awk '{ print $2 * 64 }' 2>/dev/null", "r" );
+ 
+       if (f)
+       {
+          if ( fgets( buf, MAX_STRING_LENGTH, f ) != NULL )
+          {
+             buf[MAX_STRING_LENGTH - 1] = '\0';
+             buf[strlen( buf ) - 1] = '\0';  /* truncate \n */
+ 
+             if ((buf[0] >= '0') && (buf[0] <= '9'))
+                L2size = atoi( buf );
+          }
+ 
+          pclose( f );
+       }
+    }
+ 
+    return( L2size );
+ }
+ 
+ 
+ 
+ static void
+ Find_Model_Name( void )
+ {
+    char *p;
+    int   len;
+ 
+ 
+    strcpy( modelName, "" );
+ 
+    p = strstr( my_update_file( &proc_ppc64_lparcfg ), "system_type=" );
+ 
+    if (p)
+    {
+       len = strchr( p+12, '\n' ) - (p+12);
+       if (len > MAX_STRING_LENGTH - 1)
+          len = MAX_STRING_LENGTH - 1;
+       strncpy( modelName, p+12, len );
+       modelName[len] = '\0';
+    }
+ }
+ 
+ 
+ 
+ static int
+ Find_IBM_Model( void )
+ {
+    char *p;
+    int   tIndex, frequency, i, L2size;
+ 
+ 
+    tIndex = -1;
+ 
+    Find_Model_Name();
+    if (! modelName)
+       tIndex = -2;
+ 
+    frequency = 1;
+ 
+    if (tIndex == -1)
+    {
+       p = proc_cpuinfo;
+       p = strstr( p, "clock" );
+       if (p)
+       {
+          p = strchr( p, ':' );
+          p++;
+          p = skip_whitespace( p );
+          frequency = (uint32_t) strtol( p, (char **) NULL , 10 );
+       }
+       else
+          tIndex = -2;
+    }
+ 
+    if (tIndex == -1)
+    {
+ /* handle special Blade server cases */
+ /* according to: http://www-03.ibm.com/systems/xbc/cog/Withdrawn/bcjs21/bcjs21aag.html */
+       if (! strncmp( modelName, "IBM,8844-31", 11 ))
+          strcpy( modelName, "IBM,8844-31Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-E3", 11 ))
+             strcpy( modelName, "IBM,8844-31Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-41", 11 ))
+             strcpy( modelName, "IBM,8844-41Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-51", 11 ))
+             strcpy( modelName, "IBM,8844-51Y" );
+       else
+          if (! strncmp( modelName, "IBM,8844-E5", 11 ))
+             strcpy( modelName, "IBM,8844-51Y" );
+ 
+       i = 0;
+       while (i < MAX_LOOKUP_ENTRIES - 1)
+       {
+          if ((! strcmp( modelName, LookupInfo[i].name )) &&
+              (abs( frequency - LookupInfo[i].speed ) < 5))  /* max. delta of 5 MHz */
+             break;
+ 
+          i++;
+       }
+ 
+       if (i < MAX_LOOKUP_ENTRIES)
+          tIndex = i;
+    }
+ 
+    if (tIndex >= 0)
+    {
+       frequency = LookupInfo[tIndex].speed;
+ 
+ /* obtain L2 cache size only for systems where necessary to speed things up */
+ 
+       L2size = -1;
+ 
+       if ((! strcmp( modelName, "IBM,7025-6F0" )) ||
+           (! strcmp( modelName, "IBM,7025-6F1" )) ||
+           (! strcmp( modelName, "IBM,7025-6H0" )) ||
+           (! strcmp( modelName, "IBM,7025-6H1" )) ||
+           (! strcmp( modelName, "IBM,7026-B80" )) ||
+           (! strcmp( modelName, "IBM,7044-270" )))
+          L2size = Find_L2_Cache_Size();
+ 
+ /* check case of 7025-6F0 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6F0" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7025-6F1 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6F1" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7025-6H0 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6H0" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7025-6H1 with 4 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7025-6H1" )) &&
+           ((frequency == 450) || (frequency == 600)) &&
+           (L2size == 4096))
+          tIndex++;
+ 
+ /* check case of 7026-B80 with 8 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7026-B80" )) &&
+           (frequency == 375) &&
+           (L2size == 8192))
+          tIndex++;
+        
+ /* check case of 7044-B80 with 8 MB L2 cache */
+       if ((! strcmp( modelName, "IBM,7044-270" )) &&
+           (frequency == 375) &&
+           (L2size == 8192))
+          tIndex++;
+ 
+ /* handle cases of POWER5(+) systems without L3 cache ("low cost" version) */
+       if (((! strcmp( modelName, "IBM,9110-510" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9111-520" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9113-550" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9115-505" )) && (frequency == 1650)) ||
+           ((! strcmp( modelName, "IBM,9115-505" )) && (frequency == 1900)) ||
+           ((! strcmp( modelName, "IBM,9124-720" )) && (frequency == 1500)) ||
+           ((! strcmp( modelName, "IBM,9131-52A" )) && (frequency == 1650)))
+       {
+          p = strstr( my_update_file( &proc_ppc64_lparcfg ), "system_potential_processors=" );
+ 
+          if (p)
+             i = strtol( p+28, (char **) NULL, 10 );
+          else
+          {
+ /* find out the number of CPUs in the system/LPAR */
+ 
+             p = my_update_file( &proc_stat );
+ 
+ /* Skip initial "cpu" token and find first real cpu "cpu0" */
+             p = strstr( p+3, "cpu");
+ 
+             i = 1;
+             while ((p = strstr( p+3, "cpu" )))
+                i++;
+          }
+ 
+          if (i > 1)
+             tIndex++;
+       }
+ 
+ /* we only need to find out the "n-way core property for the */
+ /* following systems to speed up things */
+       if ((! strcmp( modelName, "IBM,8202-E4B" )) ||    /* p7 720 B-Model */
+           (! strcmp( modelName, "IBM,8202-E4C" )) ||    /* p7 720 C-Model */
+           (! strcmp( modelName, "IBM,8205-E6B" )) ||    /* p7 740 B-Model */
+           (! strcmp( modelName, "IBM,8205-E6C" )) ||    /* p7 740 C-Model */
+           (! strcmp( modelName, "IBM,8231-E2B" )) ||    /* p7 710/730 B-Model */
+           (! strcmp( modelName, "IBM,8231-E2C" )) ||    /* p7 730 C-Model */
+           (! strcmp( modelName, "IBM,8233-E8B" )) ||    /* p7 750 */
+           (! strcmp( modelName, "IBM,9117-570" )) ||
+           (! strcmp( modelName, "IBM,9117-MMA" )) ||
+           (! strcmp( modelName, "IBM,9131-52A" )))
+          nWayCores = Find_nWay_Cores();
+ 
+ /* check cases of POWER7 720 B-Model */
+       if (! strcmp( modelName, "IBM,8202-E4B" ))
+       {
+          if (nWayCores == 6) tIndex++;
+          else
+             if (nWayCores == 8) tIndex += 2;
+       }
+ 
+ /* check cases of POWER7 720 C-Model */
+       if (! strcmp( modelName, "IBM,8202-E4C" ))
+       {
+          if (nWayCores == 6) tIndex++;
+          else
+             if (nWayCores == 8) tIndex += 2;
+       }
+ 
+ /* check case of POWER7 740 B-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8205-E6B" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 740 C-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8205-E6C" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 710/730 B-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8231-E2B" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 730 C-Model @ 3.7GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8231-E2C" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 750 @ 3.3GHz with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8233-E8B" )) &&
+           (frequency == 3300) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER7 750 (refreshed) with 6-core chip module */
+       if ((! strcmp( modelName, "IBM,8233-E8B" )) &&
+           (frequency == 3700) &&
+           (nWayCores == 6))
+          tIndex++;
+ 
+ /* check case of POWER5 9117-570 @ 1900 MHz if dual-core or quad-core */
+       if ((! strcmp( modelName, "IBM,9117-570" )) &&
+           (frequency == 1900) &&
+           (nWayCores == 4))
+          tIndex++;
+ 
+ /* check case of POWER6 9117-MMA @ 4208 MHz if dual-core or quad-core */
+       if ((! strcmp( modelName, "IBM,9117-MMA" )) &&
+           (frequency == 4208) &&
+           (nWayCores == 4))
+          tIndex++;
+ 
+ /* check case of POWER5+ 9131-52A @ 1650 MHz if dual-core or quad-core */
+       if ((! strcmp( modelName, "IBM,9131-52A" )) &&
+           (frequency == 1650) &&
+           (nWayCores == 4))
+          tIndex++;
+   }
+   else
+      tIndex = MAX_LOOKUP_ENTRIES;
+ 
+    return( tIndex );
+ }
+ 
+ 
+ 
+ /* find out the properties of the system we're running on */
+ 
+ static void
+ Find_System_Properties( void )
+ {
+    nWaySMT = Find_Number_of_SMT_Threads();
+    tableIndex = Find_IBM_Model();
+ }
+ 
+ 
+ 
+ /* calculate rPerf for 'val' with the big rPerf table via linear interpolation */
+ 
+ static float
+ rPerf_Interpolate( float val )
+ {
+    int    i;
+    double f, rPerfDiff, Numerator, Denominator;
+ 
+ 
+    i = 0;
+ 
+    while ((i < MAX_PROC_PERF_ENTRIES - 1) &&
+           (LookupInfo[tableIndex].value[i+1].cores > 0) &&
+           (val > LookupInfo[tableIndex].value[i].cores))
+       i++;
+ 
+    if (i > 0)
+    {
+       rPerfDiff = LookupInfo[tableIndex].value[i].rperf
+                     - LookupInfo[tableIndex].value[i-1].rperf;
+ 
+ /* we know that val > LookupInfo[tableIndex].value[i-1].cores */
+       Numerator = val - (float) LookupInfo[tableIndex].value[i-1].cores;
+ 
+       Denominator = (float) (LookupInfo[tableIndex].value[i].cores
+                                - LookupInfo[tableIndex].value[i-1].cores);
+ 
+       f = LookupInfo[tableIndex].value[i-1].rperf +
+             rPerfDiff * Numerator / Denominator;
+    } 
+    else
+    {
+       if (tableIndex != MAX_LOOKUP_ENTRIES - 1)  /* Unknown system */
+ /*
+  * we know that:
+  *               1) i == 0
+  *               2) val <= LookupInfo[tableIndex].value[i].cores
+  */
+          f = (val / (float) LookupInfo[tableIndex].value[i].cores) *
+                 LookupInfo[tableIndex].value[i].rperf;
+       else
+          f = 0.0;
+    }
+ 
+    return( f );
+ }
+ 
+ 
+ 
+ static float
+ rPerf_to_SPECint_rate2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECint_rate2006 );
+ }
+ 
+ static float
+ rPerf_to_SPECint_rate_base2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECint_rate_base2006 );
+ }
+ 
+ static float
+ rPerf_to_SPECfp_rate2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECfp_rate2006 );
+ }
+ 
+ static float
+ rPerf_to_SPECfp_rate_base2006( float f )
+ {
+    return( f * LookupInfo[tableIndex].SPECfp_rate_base2006 );
+ }
+ 
+ 
+ 
+ static void
+ CheckPURRusability( void )
+ {
+    purrUsable = TRUE;
+ 
+    if ((! strncmp( modelName, "IBM,8842-21X", 12 )) ||
+        (! strncmp( modelName, "IBM,8842-41X", 12 )) ||
+        (! strncmp( modelName, "IBM,8844-31",  11 )) ||
+        (! strncmp( modelName, "IBM,8844-41",  11 )) ||
+        (! strncmp( modelName, "IBM,8844-51",  11 )))
+       purrUsable = FALSE;
+ }
+ 
+ 
+ 
+ static float
+ Calculate_rPerf_func( void )
+ {
+    g_val_t val;
+    static float last_rPerf = 0.0;
+    static long long purr_saved = 0LL;
+    long long purr, purr_diff, timebase;
+    static double last_time = 0.0;
+    static double last_system_check_time = 0.0;
+    static float last_val = 0.0;
+    double now, delta_t;
+    struct timeval timeValue;
+    struct timezone timeZone;
+    char *p;
+    int cpus;
+ 
+ 
+    gettimeofday( &timeValue, &timeZone );
+    now = (double) (timeValue.tv_sec - boottime) + (timeValue.tv_usec / 1000000.0);
+ 
+    delta_t = now - last_time;
+ 
+ /* obtain only every MIN_DELAY_TIME seconds the rPerf value */
+    if (delta_t < MIN_DELAY_TIME)
+      return( last_rPerf );
+ 
+ /* check every MAX_CHECKSYSTEM_TIME seconds if we are still on the same system --> LPAR Mobility */
+    if (now - last_system_check_time >= MAX_CHECKSYSTEM_TIME)
+    {
+ /* read required '/proc/cpuinfo' file */
+       val.int32 = slurpfile( "/proc/cpuinfo", proc_cpuinfo, BUFFSIZE );
+       if ( val.int32 == SYNAPSE_FAILURE )
+          err_msg( "rperf_func() got an error from slurpfile() /proc/cpuinfo" );
+ 
+       Find_System_Properties();
+       CheckPURRusability();
+ 
+ /* obtain time again as 'Find_System_Properties' might take some time! */
+       gettimeofday( &timeValue, &timeZone );
+       now = (double) (timeValue.tv_sec - boottime) + (timeValue.tv_usec / 1000000.0);
+ 
+       last_system_check_time = now;
+    }
+ 
+    p = strstr( my_update_file( &proc_ppc64_lparcfg ), "purr=" );
+ 
+    if (p && purrUsable)
+    {
+       delta_t = now - last_time;
+ 
+       purr = strtoll( p+5, (char **) NULL, 10 );
+ 
+       p = strstr( proc_cpuinfo, "timebase" );
+ 
+       if ((delta_t > 0.0) && (p))
+       {
+          p = strchr( p, ':' );
+          p = skip_whitespace( p+1 );
+ 
+          timebase = strtoll( p, (char **) NULL, 10 );
+ 
+          purr_diff = purr - purr_saved;
+ 
+          if ((timebase > 0LL) && (purr_diff >= 0LL))
+             val.f = (double) (purr_diff) / (double) timebase / delta_t;
+          else
+             val.f = last_val;
+       }
+       else
+          val.f = 0.0;
+ 
+       purr_saved = purr;
+    }
+    else /* dedicated LPAR/standalone system so calculate cpu_used with cpu_idle_func() */
+    {
+ /* find out number of CPUs in the system/LPAR via /proc/ppc64/lparcfg */
+ /* --> partition_active_processors should always exist */
+       p = strstr( my_update_file( &proc_ppc64_lparcfg ), "partition_active_processors=" );
+ 
+       if (p)
+       {
+          cpus = strtol( p+28, (char **) NULL, 10 );
+ 
+          val = cpu_idle_func();
+          val.f = (float) cpus * (100.0 - val.f) / 100.0;
+       }
+       else
+          val.f = 0.0;
+    }
+ 
+ /* sanity check to prevent against accidental huge value */
+    if (val.f >= 256.0)
+       val.f = 0.0;
+ 
+    last_time = now;
+    last_val = val.f;
+ 
+ /* now calculate the rPerf value */
+    last_rPerf = rPerf_Interpolate( val.f );
+ 
+    return( last_rPerf );
+ }
+ 
+ 
+ 
+ g_val_t
+ rperf_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = Calculate_rPerf_func();
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECint_rate2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECint_rate2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECint_rate_base2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECint_rate_base2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECfp_rate2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECfp_rate2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ g_val_t
+ SPECfp_rate_base2006_func( void )
+ {
+    g_val_t val;
+ 
+ 
+    val.f = rPerf_to_SPECfp_rate_base2006( Calculate_rPerf_func() );
+ 
+    return( val );
+ }
+ 
+ 
+ 
+ static time_t
+ boottime_func_CALLED_ONCE( void )
+ {
+    char   *p;
+    time_t  boottime;
+ 
+ 
+    p = my_update_file( &proc_stat );
+ 
+    p = strstr( p, "btime" );
+    if (p)
+    {
+       p = skip_token( p );
+       boottime = strtod( p, (char **) NULL );
+    }
+    else
+       boottime = 0;
+ 
+ 
+    return( boottime );
+ }
+ 
+ 
+ 
+ /* generate our lookup table out of the rPerf and ROLTP table */
+ 
+ static void
+ Generate_Lookup_Table( void )
+ {
+    int i, j, k;
+ 
+ 
+    j = 0;
+    for (i = 0;  i < MAX_RPERF_MACHINE_ENTRIES - 1;  i++)
+    {
+       LookupInfo[j] = rPerf_Info[i];
+       j++;
+    }
+    for (i = 0;  i < MAX_ROLTP_MACHINE_ENTRIES;  i++)
+    {
+       LookupInfo[j] = ROLTP_Info[i];
+ 
+       for (k = 0;  k < MAX_PROC_PERF_ENTRIES;  k++)
+          LookupInfo[j].value[k].rperf /= ROLTP_TO_RPERF;
+ 
+       j++;
+    }
+ }
+ 
+ 
+ 
+ /*
+  * Declare ourselves so the configuration routines can find and know us.
+  * We'll fill it in at the end of the module.
+  */
+ extern mmodule ibmrperf_module;
+ 
+ 
+ static int
+ ibmrperf_metric_init ( apr_pool_t *p )
+ {
+    int     i;
+    g_val_t val;
+ 
+ 
+    for (i = 0;  ibmrperf_module.metrics_info[i].name != NULL;  i++)
+    {
+       /* Initialize the metadata storage for each of the metrics and then
+        *  store one or more key/value pairs.  The define MGROUPS defines
+        *  the key for the grouping attribute. */
+       MMETRIC_INIT_METADATA( &(ibmrperf_module.metrics_info[i]), p );
+       MMETRIC_ADD_METADATA( &(ibmrperf_module.metrics_info[i]), MGROUP, "ibmrperf" );
+    }
+ 
+ 
+ /* generate our lookup table out of the rPerf and ROLTP table */
+ 
+    Generate_Lookup_Table();
+ 
+ 
+ /* read required '/proc/cpuinfo' file */
+ 
+    val.int32 = slurpfile( "/proc/cpuinfo", proc_cpuinfo, BUFFSIZE );
+    if ( val.int32 == SYNAPSE_FAILURE )
+    {
+       err_msg( "metric_init() got an error from slurpfile() /proc/cpuinfo" );
+       return( SYNAPSE_FAILURE );
+    }
+ 
+ 
+ /* find out the properties of the system we're running on */
+ 
+    Find_System_Properties();
+ 
+ 
+ /* initialize the routines which require a time interval */
+ 
+    boottime = boottime_func_CALLED_ONCE();
+ 
+    CheckPURRusability();
+ 
+    val = rperf_func();
+ 
+ 
+ /* return SUCCESS */
+ 
+    return( 0 );
+ }
+ 
+ 
+ 
+ static void
+ ibmrperf_metric_cleanup ( void )
+ {
+ }
+ 
+ 
+ 
+ static g_val_t
+ ibmrperf_metric_handler ( int metric_index )
+ {
+    g_val_t val;
+ 
+ /* The metric_index corresponds to the order in which
+    the metrics appear in the metric_info array
+ */
+    switch (metric_index)
+    {
+       case 0:  return( rperf_func() );
+       case 1:  return( SPECint_rate2006_func() );
+       case 2:  return( SPECint_rate_base2006_func() );
+       case 3:  return( SPECfp_rate2006_func() );
+       case 4:  return( SPECfp_rate_base2006_func() );
+       default: val.uint32 = 0; /* default fallback */
+    }
+ 
+    return( val );
+ }
+ 
+ 
+ 
+ static Ganglia_25metric ibmrperf_metric_info[] = 
+ {
+    {0, "rperf",                 15, GANGLIA_VALUE_FLOAT, "rPerf",        "both", "%.4f", UDP_HEADER_SIZE+8, "Relative Performance rPerf number"},
+    {0, "SPECint_rate2006",      15, GANGLIA_VALUE_FLOAT, "SPECint_2006", "both", "%.4f", UDP_HEADER_SIZE+8, "SPECint_rate2006 value"},
+    {0, "SPECint_rate_base2006", 15, GANGLIA_VALUE_FLOAT, "SPECint_2006", "both", "%.4f", UDP_HEADER_SIZE+8, "SPECint_rate_base2006 value"},
+    {0, "SPECfp_rate2006",       15, GANGLIA_VALUE_FLOAT, "SPECfp_2006",  "both", "%.4f", UDP_HEADER_SIZE+8, "SPECfp_rate2006 value"},
+    {0, "SPECfp_rate_base2006",  15, GANGLIA_VALUE_FLOAT, "SPECfp_2006",  "both", "%.4f", UDP_HEADER_SIZE+8, "SPECfp_rate_base2006 value"},
+    {0, NULL}
+ };
+ 
+ 
+ 
+ mmodule ibmrperf_module =
+ {
+    STD_MMODULE_STUFF,
+    ibmrperf_metric_init,
+    ibmrperf_metric_cleanup,
+    ibmrperf_metric_info,
+    ibmrperf_metric_handler,
+ };
+ 
*** ./gmond/modules/Makefile.am.ORIG	Thu Sep  2 14:38:23 2010
--- ./gmond/modules/Makefile.am	Thu Sep  2 14:38:40 2010
***************
*** 6,16 ****
  STATUS_SUBDIR = status
  endif
  
! DIST_SUBDIRS = example cpu disk memory network system status python
  if STATIC_BUILD
! SUBDIRS = cpu disk memory network system $(STATUS_SUBDIR) $(PYTHON_SUBDIR)
  else
! SUBDIRS = example cpu disk memory network system $(STATUS_SUBDIR) $(PYTHON_SUBDIR)
  
  install: install-recursive
  	@rm -rf $(DESTDIR)$(pkglibdir)/*.a
--- 6,16 ----
  STATUS_SUBDIR = status
  endif
  
! DIST_SUBDIRS = ibmrperf example cpu disk memory network system status python
  if STATIC_BUILD
! SUBDIRS = ibmrperf cpu disk memory network system $(STATUS_SUBDIR) $(PYTHON_SUBDIR)
  else
! SUBDIRS = ibmrperf example cpu disk memory network system $(STATUS_SUBDIR) $(PYTHON_SUBDIR)
  
  install: install-recursive
  	@rm -rf $(DESTDIR)$(pkglibdir)/*.a
*** ./gmond/Makefile.am.ORIG	Tue Apr  5 01:10:15 2011
--- ./gmond/Makefile.am	Mon Aug  8 23:18:59 2011
***************
*** 14,19 ****
--- 14,20 ----
           modules/memory/mod_mem.lo modules/network/mod_net.lo \
           modules/system/mod_proc.lo modules/system/mod_sys.lo \
           modules/cpu/mod_multicpu.lo \
+          modules/ibmrperf/mod_ibmrperf.lo \
           $(MOD_GSTATUS) @STATIC_USER_MODULES@
  GLDFLAGS = -static @EXPORT_SYMBOLS@
  if BUILD_PYTHON
*** ./configure.in.ORIG	Thu Sep  2 14:40:20 2010
--- ./configure.in	Thu Sep  2 14:43:16 2010
***************
*** 606,611 ****
--- 606,612 ----
  		      moduledir="$libdir/ganglia"
  		   fi
  		fi
+ 		ln -sf mod_ibmrperf-linux.c gmond/modules/ibmrperf/mod_ibmrperf.c
  		;;
  *ia64-*hpux*)	CFLAGS="$CFLAGS -D_PSTAT64 -D_HPUX_SOURCE" 
  		LIBS="-lpthread $LIBS"
***************
*** 626,631 ****
--- 627,633 ----
  		AC_DEFINE(AIX, 1, AIX)
  		LIBS="-lm $LIBS"
  		EXPORT_SYMBOLS_DYNAMIC="-Wl,-bexpfull"
+ 		ln -sf mod_ibmrperf-aix.c gmond/modules/ibmrperf/mod_ibmrperf.c
  		;;
  *hpux*)		CFLAGS="$CFLAGS -D_HPUX_SOURCE" 
  		LIBS="-lpthread $LIBS"
***************
*** 751,756 ****
--- 753,759 ----
            gstat/Makefile 
            gmond/modules/Makefile
            gmond/modules/example/Makefile
+           gmond/modules/ibmrperf/Makefile
            gmond/modules/cpu/Makefile
            gmond/modules/disk/Makefile
            gmond/modules/memory/Makefile
